Datasheet

© 2011 Microchip Technology Inc. DS25006A-page 13
MCP14E6/7/8
4.0 APPLICATION INFORMATION
4.1 General Information
MOSFET drivers are high-speed, high-current devices
which are intended to source/sink high-peak currents to
charge/discharge the gate capacitance of external
MOSFETs, or insulated gate bipolar transistors
(IGBTs). In high-frequency switching power supplies,
the Pulse-Width Modulation (PWM) controller may not
have the drive capability to directly drive the power
MOSFET. MOSFET drivers, like the MCP14E6/7/8
family, can be used to provide additional source/sink
current capability.
An additional degree of control has been added to the
MCP14E6/7/8 family. There are seperate enable func-
tions for each driver that allow for the immediate termi-
nation of the output pulse, regardless of the state of the
input signal.
4.2 MOSFET Driver Timing
The ability of a MOSFET driver to transition from a fully
OFF state to a fully ON state are characterized by the
drivers’ rise time (t
R
), fall time (t
F
) and propagation
delays (t
D1
and t
D2
). The MCP14E6/7/8 family of drivers
can typically charge and discharge a 1000 pF load
capacitance, in approximately 12 ns, along with a typical
matched propagation delay of 45 ns. Figure 4-1 and
Figure 4-2 show the test circuit and timing waveform
used to verify the MCP14E6/7/8 timing.
FIGURE 4-1: Inverting Driver Timing
Waveform.
FIGURE 4-2: Non-Inverting Driver Timing
Waveform
4.3 Enable Function
The ENB_A and ENB_B enable pins allow the indepen-
dent control of OUT A and OUT B, respectively. They
are active-high and are internally pulled up to V
DD
so
that the default state is to enable the driver. These pins
can be left floating for normal operation.
When an enable pin voltage is above enable pin high
threshold voltage, (V
EN_H
), that driver output is enabled
and allowed to react to changes in the INPUT pin volt-
age state. Similarly, when the enable pin voltage falls
below the enable pin low threshold voltage, (V
EN_L
),
that driver output is disabled and does not respond to
the changes in the INPUT pin voltage state. When the
driver is disabled, the output goes to a low state. Refer
to Tab l e 4 - 1 for enable pin logic. The threshold voltages
of the enable function are compatible with logic levels.
Hysteresis is provided to help increase the noise immu-
nity of the enable function, avoiding false triggers of the
enable signal during driver switching. For robust
designs, it is recommended that the slew rate of the
enable pin signal be greater than 1V/ns.
There are propagation delays associated with the
driver receiving an enable signal and the output
reacting. These propagation delays, t
D3
and t
D4
, are
graphically represented in Figure 4-3.
0.1 µF
+5V
10%
90%
10%
90%
10%
90%
18V
1µF
0V
0V
C
L
= 1000 pF
Input
Input
Output
t
D1
t
F
t
D2
Output
t
R
V
DD
= 18V
Ceramic
C
L
= 1000 pF
Input Output
MCP14E6
½ MCP14E8
90%
Input
t
D1
t
F
t
D
2
Output
t
R
10%
10%
10%
+5V
18V
0V
0V
90%
90%
0.1 µF
1µF
C
L
= 1000 pF
Input Output
V
DD
=18V
Ceramic
C
L
= 1000 pF
Input Output
MCP14E6
½ MCP14E8