Datasheet

MCP14628
DS22083A-page 8 © 2008 Microchip Technology Inc.
3.0 PIN DESCRIPTIONS
The descriptions of the pins are listed in Table 3-1.
TABLE 3-1: PIN FUNCTION TABLE .
3.1 High-side Gate Driver Pin
(HIGHDR)
The HIGHDR pin provides the gate drive signal to
control the high-side power MOSFET. The gate of the
high-side power MOSFET is connected to this pin.
3.2 Floating Bootstrap Supply Pin
(BOOT)
The BOOT pin is the floating bootstrap supply pin for
the high-side gate drive. A capacitor is connected
between this pin and the PHASE pin to provide the
necessary charge to turn on the high-side power MOS-
FET.
3.3 PWM Input Control Pin (PWM)
The control input signal is supplied to the PWM pin.
This tri-state pin controls the state of the HIGHDR and
LOWDR pins. Placing a voltage equal to V
CC
/2 on this
pin causes both the HIGHDR and LOWDR to a low
state.
3.4 Ground Pin (GND)
The GND pin provides ground for the MCP14628 cir-
cuitry. It should have a low impedance connection to
the bias supply source return. High peak currents will
flow out the GND pin when the low-side power
MOSFET is being turned off.
3.5 Low-side Gate Driver Pin
(LOWDR)
The LOWDR pin provides the gate drive signal to
control the low-side power MOSFET. The gate of the
low-side power MOSFET is connected to this pin.
3.6 Supply Input Voltage Pin (V
CC
)
The V
CC
pin provides bias to the MCP14628. A bypass
capacitor is to be placed between this pin and the GND
pin. This capacitor should be placed as close to the
MCP14628 as possible.
3.7 Forced Continuous Conduction
Mode Pin (FCCM)
The FCCM pin enables or disables the forced
continuous conduction mode. With the FCCM pin con-
nected to ground the MCP14628 enters a diode emula-
tion mode to improve system efficiency at light loads.
Continuous conduction is forced if the FCCM pin is
connected to V
CC
.
3.8 Switch Node Pin (PHASE)
The PHASE pin provides the return path for the high-
side gate driver. The source of the high-side power
MOSFET is connected to this pin.
3.9 DFN Exposed Pad
The exposed metal pad of the DFN package is not
internally connected to any potential. Therefore, this
pad can be connected to a ground plane or other
copper plane on a printed circuit board to aid in heat
removal from the package.
SOIC 3x3 DFN Symbol Description
1 1 HIGHDR High-side Gate Driver Pin
2 2 BOOT Floating Bootstrap Supply Pin
3 3 PWM PWM Input Control Pin
4 4 GND Ground
5 5 LOWDR Low-side Gate Driver Pin
66V
CC
Supply Input Voltage
7 7 FCCM Forced Continuous Conduction Mode Pin
8 8 PHASE Switch Node Pin
— PAD NC Exposed Metal Pad