Datasheet

MCP131X/2X
DS21985D-page 34  2005-2012 Microchip Technology Inc.
4.5 Watchdog Timer
The purpose of the Watchdog Timer (WDT) is to
increase system reliability. The Watchdog Timer
feature can be used to detect when the Host
Controller’s program flow is not as expected. The
Watchdog Timer monitors for activity on the Watchdog
Input pin (WDI). The WDI pin is expected to be strobed
within a given time frame. When this time frame is
exceeded, without an edge transition on the WDI pin,
the Reset pin is driven active to reset the system. This
stops the Host Controller from continuing its erratic
behavior (“run-away” code execution).
The Watchdog Timer is external to the main portion of
the control system and monitors the operation of the
system. This feature is enabled by a falling edge on the
WDI pin (after device POR). Monitoring is then done by
requiring the embedded controller to force an edge
transition (falling or rising) on the WDI pin (“pet the
Watchdog”) within a predetermined time frame (T
WD
).
If the MCP131X/2X does not detect an edge on the
WDI pin within the expected time frame, the
MCP131X/2X device will force the Reset pin active.
The Watchdog Timer is in the disabled state when:
• The Device Powers up
• A POR event occurred
• A WDT event occurred
• A Manual Reset (MR
) event occurred
When the Watchdog Timer is in the disabled state, the
WDI pin has an internal smart pull-up resistor enabled.
This pull-up resistor has a typical value of 52 k. This
pull-up resistor holds the WDI signal in the high state,
until it is forced to another state.
After the embedded controller has initialized, if the
Watchdog Timer feature is to be used, then the embed-
ded controller can force the WDI pin low (V
IL
). This also
enables the Watchdog Timer feature and disables the
WDI pull-up resistor. Disabling the pull-up resistor
reduces the device’s current consumption. The pull-up
resistor will remain disconnected until the device has a
power-on, a Reset event occurs, or after the WDT time
out.
Once the Watchdog Timer has been enabled, the Host
Controller must force an edge transition (falling or ris-
ing) on the WDI pin before the minimum Watchdog
Timer time out to ensure that the Watchdog Timer does
not force the Reset pins (RST/RST
) to the active state.
If an edge transition does not occur before the maxi-
mum time out occurs, then the MCP131X/2X will force
the Reset pins to their active state.
The MCP131X/2X supports four time outs. The stan-
dard offering devices have a typical Watchdog Timer
period (T
WDT
) of 1.6 s. Tabl e 4-3 shows the available
Watchdog Timer periods. The t
WDT
time-out is a
function of the device voltage and temperature.
Figure 4-19 shows a block diagram for using the
MCP131X/2X with a PIC
®
microcontroller (MCU) and
the Watchdog input.
TABLE 4-3: WATCHDOG TIMER
PERIODS
(1)
FIGURE 4-19: Watchdog Timer.
The software routine that strobes WDI is critical. The
code must be in a section of software that is executed
frequently enough so the time between edge
transitions is less than the Watchdog time-out period.
One common technique controls the Host Controllers
I/O line from two sections of the program. The software
might set the I/O line high while operating in the
Foreground mode and set it low while in the
Background or Interrupt modes. If both modes do not
execute correctly, the Watchdog Timer issues Reset
pulses.
t
WDT
Units
Min Typ Max
4.3 6.3 9.3 ms
71 102 153 ms
1.12 1.6 2.4 sec
17.9 25.6 38.4 sec

If the time between
WDI edges is less
than this, it
ensures that the
MCP131X/2X
never forces a
Reset
If the time
between WDI
edges is greater
than this, it
ensures that the
MCP131X/2X
always forces a
Reset
Note 1: Shaded rows are custom ordered Watch-
dog Timer Periods (t
WDT
) time outs. For
information on ordering devices with
these t
WDT
time outs, please contact your
local Microchip sales office. Minimum
purchase volumes are required.
V
CC
GND
RST
WDI
MCLR
+5V
MCP13XX
0.1
10 k
I/O
PIC
®
3-Terminal
Regulator
+5V
µF
MCU
(example:
MCP1700)