Datasheet

2009-2014 Microchip Technology Inc. DS7000591F-page 81
dsPIC33FJ32GS406/606/608/610 and dsPIC33FJ64GS406/606/608/610
TABLE 4-28: UART1 REGISTER MAP
File Name
SFR
Addr.
Bit 15 Bit 14 Bit 13 Bit 12 Bit 11 Bit 10 Bit 9 Bit 8 Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
All
Resets
U1MODE 0220 UARTEN
USIDL IREN RTSMD UEN1 UEN0 WAKE LPBACK ABAUD URXINV BRGH PDSEL1 PDSEL0 STSEL 0000
U1STA 0222 UTXISEL1 UTXINV UTXISEL0
UTXBRK UTXEN UTXBF TRMT URXISEL1 URXISEL0 ADDEN RIDLE PERR FERR OERR URXDA 0110
U1TXREG 0224
UART1 Transmit Register xxxx
U1RXREG 0226
UART1 Receive Register 0000
U1BRG 0228 Baud Rate Generator Prescaler 0000
Legend: x = unknown value on Reset, — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.
TABLE 4-29: UART2 REGISTER MAP
File
Name
SFR
Addr
Bit 15 Bit 14 Bit 13 Bit 12 Bit 11 Bit 10 Bit 9 Bit 8 Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
All
Resets
U2MODE 0230 UARTEN
USIDL IREN RTSMD UEN1 UEN0 WAKE LPBACK ABAUD URXINV BRGH PDSEL1 PDSEL0 STSEL 0000
U2STA 0232 UTXISEL1 UTXINV UTXISEL0
UTXBRK UTXEN UTXBF TRMT URXISEL1 URXISEL0 ADDEN RIDLE PERR FERR OERR URXDA 0110
U2TXREG 0234
UART2 Transmit Register xxxx
U2RXREG 0236
UART2 Receive Register 0000
U2BRG 0238 Baud Rate Generator Prescaler 0000
Legend: x = unknown value on Reset, — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.