Datasheet

2009-2014 Microchip Technology Inc. DS7000591F-page 69
dsPIC33FJ32GS406/606/608/610 and dsPIC33FJ64GS406/606/608/610
TABLE 4-11: TIMERS REGISTER MAP
TABLE 4-12: INPUT CAPTURE REGISTER MAP
File
Name
SFR
Addr
Bit 15 Bit 14 Bit 13 Bit 12 Bit 11 Bit 10 Bit 9 Bit 8 Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
All
Resets
TMR1 0100 Timer1 Register 0000
PR1 0102 Period Register 1 FFFF
T1CON 0104 TON
—TSIDL TGATE TCKPS1 TCKPS0 TSYNC TCS 0000
TMR2 0106 Timer2 Register 0000
TMR3HLD 0108 Timer3 Holding Register (for 32-bit timer operations only) xxxx
TMR3 010A Timer3 Register 0000
PR2 010C Period Register 2 FFFF
PR3 010E Period Register 3 FFFF
T2CON 0110 TON
—TSIDL TGATE TCKPS1 TCKPS0 T32 —TCS 0000
T3CON 0112 TON
—TSIDL TGATE TCKPS1 TCKPS0 —TCS 0000
TMR4 0114 Timer4 Register 0000
TMR5HLD 0116 Timer5 Holding Register (for 32-bit timer operations only) xxxx
TMR5 0118 Timer5 Register 0000
PR4 011A Period Register 4 FFFF
PR5 011C Period Register 5 FFFF
T4CON 011E TON
—TSIDL TGATE TCKPS1 TCKPS0 T32 —TCS 0000
T5CON 0120 TON
—TSIDL TGATE TCKPS1 TCKPS0 —TCS 0000
Legend: x = unknown value on Reset, — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.
File
Name
SFR
Addr
Bit 15 Bit 14 Bit 13 Bit 12 Bit 11 Bit 10 Bit 9 Bit 8 Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
All
Resets
IC1BUF 0140 Input 1 Capture Register xxxx
IC1CON 0142
—ICSIDL ICTMR ICI1 ICI0 ICOV ICBNE ICM2 ICM1 ICM0 0000
IC2BUF 0144 Input 2 Capture Register xxxx
IC2CON 0146
—ICSIDL ICTMR ICI1 ICI0 ICOV ICBNE ICM2 ICM1 ICM0 0000
IC3BUF 0148 Input 3 Capture Register xxxx
IC3CON 014A
—ICSIDL ICTMR ICI1 ICI0 ICOV ICBNE ICM2 ICM1 ICM0 0000
IC4BUF 014C Input 4 Capture Register xxxx
IC4CON 014E
—ICSIDL ICTMR ICI1 ICI0 ICOV ICBNE ICM2 ICM1 ICM0 0000
Legend: x = unknown value on Reset,= unimplemented, read as ‘0’. Reset values are shown in hexadecimal.