Datasheet
dsPIC33FJ32GS406/606/608/610 and dsPIC33FJ64GS406/606/608/610
DS70000591F-page 454 2009-2014 Microchip Technology Inc.
TRGCONx (PWM Trigger Control x).........................249
TRIGx (PWM Primary Trigger x
Compare Value)................................................251
TxCON (Timerx Control, x = 2, 4) ............................. 222
TyCON (Timery Control, y = 3, 5) ............................. 223
UxMODE (UARTx Mode)..........................................280
UxSTA (UARTx Status and Control).........................282
Resets...............................................................................115
Brown-out Reset (BOR)............................................115
Illegal Condition Reset (IOPUWR)............................115
Illegal Opcode ...................................................115, 121
Master Clear Pin Reset (MCLR
) ...............................115
Power-on Reset (POR).............................................115
Security .....................................................................121
Security Reset...........................................................115
Software RESET Instruction (SWR) ......................... 115
Trap Conflict Reset (TRAPR)....................................115
Uninitialized W Register....................................115, 121
Watchdog Timer Reset (WDTO)...............................115
Revision History ................................................................442
S
Serial Peripheral Interface (SPI) .......................................265
Software RESET Instruction (SWR)..................................121
Software Stack Pointer, Frame Pointer
CALL Stack Frame......................................................99
Special Features of the CPU.............................................349
T
Thermal Operating Conditions ..........................................370
Thermal Packaging Characteristics ..................................370
Timer1...............................................................................217
Mode Settings ...........................................................217
Timer2/3/4/5......................................................................219
16-Bit Operation........................................................220
32-Bit Operation........................................................220
32-Bit Timer ..............................................................220
Mode Settings ...........................................................220
Timing Diagrams
Analog-to-Digital Conversion per Input .....................411
Brown-out Situations.................................................120
ECAN I/O ..................................................................416
External Clock........................................................... 383
High-Speed PWMx Characteristics...........................393
High-Speed PWMx Fault Characteristics..................393
I/O Characteristics ....................................................386
I2Cx Bus Data (Master Mode) ..................................406
I2Cx Bus Data (Slave Mode) ....................................408
I2Cx Bus Start/Stop Bits (Master Mode) ................... 406
I2Cx Bus Start/Stop Bits (Slave Mode) .....................408
Input Capture x (ICx) Characteristics........................391
OCx/PWMx Characteristics ......................................392
Output Compare x (OCx) Characteristics ................. 391
Output Compare x Operation....................................228
QEA/QEB Input Characteristics................................413
QEI Module Index Pulse ...........................................414
Reset, Watchdog Timer, Oscillator Start-up Timer
and Power-up Timer .........................................387
SPIx Master Mode (Full-Duplex, CKE = 0,
CKP = x, SMP = 1)............................................397
SPIx Master Mode (Full-Duplex, CKE = 1,
CKP = x, SMP = 1)............................................396
SPIx Master Mode (Half-Duplex,
Transmit Only, CKE = 0)...................................394
SPIx Master Mode (Half-Duplex,
Transmit Only, CKE = 1)...................................394
SPIx Slave Mode (Full-Duplex, CKE = 0,
CKP = 0, SMP = 0)........................................... 404
SPIx Slave Mode (Full-Duplex, CKE = 0,
CKP = 1, SMP = 0)........................................... 402
SPIx Slave Mode (Full-Duplex, CKE = 1,
CKP = 0, SMP = 0)........................................... 398
SPIx Slave Mode (Full-Duplex, CKE = 1,
CKP = 1, SMP = 0)........................................... 400
System Reset ........................................................... 119
Timer1/2/3 External Clock ........................................ 389
TimerQ (QEI Module) External Clock
Characteristics.................................................. 415
Timing Requirements
10-Bit, High-Speed ADC........................................... 411
Auxiliary PLL Clock Specifications............................ 384
Capacitive Loading on Output Pins .......................... 382
DMA Read/Write....................................................... 416
ECAN I/O.................................................................. 416
External Clock........................................................... 383
High-Speed PWMx ................................................... 393
I/O............................................................................. 386
I2Cx Bus Data (Master Mode) .................................. 407
I2Cx Bus Data (Slave Mode) .................................... 409
Input Capture x (ICx) ................................................ 391
Output Compare x (OCx).......................................... 391
PLL Clock Specifications .......................................... 384
QEI External Clock ................................................... 415
QEI Index Pulse........................................................ 415
Quadrature Decoder................................................. 414
Reset, Watchdog Timer, Oscillator Start-up Timer,
Power-up Timer and Brown-out Reset ............. 388
Simple OCx/PWMx Mode......................................... 392
SPIx Master Mode (Full-Duplex, CKE = 0,
CKP = x, SMP = 1) ........................................... 397
SPIx Master Mode (Full-Duplex, CKE = 1,
CKP = x, SMP = 1) ........................................... 396
SPIx Master Mode (Half-Duplex,
Transmit Only).................................................. 395
SPIx Slave Mode (Full-Duplex, CKE = 0,
CKP = 0, SMP = 0)........................................... 405
SPIx Slave Mode (Full-Duplex, CKE = 0,
CKP = 1, SMP = 0)........................................... 403
SPIx Slave Mode (Full-Duplex, CKE = 1,
CKP = 0, SMP = 0)........................................... 399
SPIx Slave Mode (Full-Duplex, CKE = 1,
CKP = 1, SMP = 0)........................................... 401
Timer1 External Clock .............................................. 389
Timer2/4 External Clock ........................................... 390
Timer3/5 External Clock ........................................... 390
Timing Requirements (50 MIPS)
External Clock........................................................... 421
Timing Specifications
Comparator Module.................................................. 412
DAC Module ............................................................. 412
DAC Output Buffer.................................................... 413
Trap Conflict Reset (TRAPR) ........................................... 121