Datasheet

 2009-2014 Microchip Technology Inc. DS70000591F-page 451
dsPIC33FJ32GS406/606/608/610 and dsPIC33FJ64GS406/606/608/610
Internet Address................................................................455
Interrupts
Alternate Interrupt Vector Table (AIVT) ....................123
Control and Status Registers.................................... 127
Interrupt Control and Status Registers
IECx..................................................................127
IFSx ..................................................................127
INTCON1.......................................................... 127
INTCON2.......................................................... 127
INTTREG..........................................................127
IPCx..................................................................127
Interrupt Vector Table (IVT) ......................................123
Reset Sequence .......................................................123
Setup Procedures .....................................................178
Initialization ....................................................... 178
Interrupt Disable ............................................... 178
Interrupt Service Routine..................................178
Trap Service Routine........................................ 178
J
JTAG Boundary Scan Interface ........................................ 349
JTAG Interface.................................................................. 355
L
Leading-Edge Blanking (LEB)........................................... 231
LPRC Oscillator
Use with WDT...........................................................353
M
Memory Organization.......................................................... 45
Microchip Internet Web Site.............................................. 455
Migrating from dsPIC33FJ06GS101/X02 and
dsPIC33FJ16GSX02/X04 to dsPIC33FJ32GS406/606/
608/610 and dsPIC33FJ64GS406/606/608/610
Devices .....................................................................441
Migration
Analog Comparators Connection.............................. 441
Device Pins and Peripheral Pin Select (PPS)........... 441
Fault and Current-Limit Control Signal
Source Selection...............................................441
Leading-Edge Blanking (LEB)................................... 441
Modes of Operation
Disable......................................................................287
Initialization ............................................................... 287
Listen All Messages.................................................. 287
Listen Only................................................................ 287
Loopback .................................................................. 287
Normal ......................................................................287
Modulo Addressing ........................................................... 101
Applicability............................................................... 102
Operation Example ................................................... 101
Start and End Address.............................................. 101
W Address Register Selection .................................. 101
MPLAB Assembler, Linker, Librarian................................366
MPLAB ICD 3 In-Circuit Debugger ................................... 367
MPLAB PM3 Device Programmer ....................................367
MPLAB REAL ICE In-Circuit Emulator System................. 367
MPLAB X Integrated Development
Environment Software............................................... 365
MPLAB X SIM Software Simulator.................................... 367
MPLIB Object Librarian..................................................... 366
MPLINK Object Linker ...................................................... 366
O
Open-Drain Configuration................................................. 215
Oscillator Configuration .................................................... 189
Control Registers...................................................... 194
Output Compare ............................................................... 227
Modes....................................................................... 228
P
Packaging......................................................................... 427
Details....................................................................... 429
Marking..................................................................... 427
Peripheral Module Disable (PMD) .................................... 205
PICkit 3 In-Circuit Debugger/Programmer........................ 367
Pinout I/O Descriptions (table)............................................ 19
Power Save Instructions
Coincident Interrupts ................................................ 204
Power-on Reset (POR)..................................................... 120
Power-Saving Features.................................................... 203
Clock Frequency....................................................... 203
Clock Switching ........................................................ 203
Power-up Timer (PWRT).................................................. 120
Program Address Space..................................................... 45
Construction ............................................................. 104
Data Access from Program Memory
Using PSV ........................................................ 107
Data Access from Program Memory Using
Table Instructions ............................................. 106
Data Access from, Address Generation ................... 105
Memory Maps............................................................. 45
Table Read High Instructions
TBLRDH ........................................................... 106
Table Read Low Instructions
TBLRDL............................................................ 106
Visibility Operation.................................................... 107
Program Memory
Interrupt Vector........................................................... 46
Organization ............................................................... 46
Reset Vector............................................................... 46
Programmer’s Model .......................................................... 35
PWM
Power-Saving Features............................................ 204
Q
Quadrature Encoder Interface (QEI)................................. 261
R
RCON Register
Use of Status Bits ..................................................... 122
Register Maps
Analog Comparator Control........................................ 91
Change Notification (dsPIC33FJ32GS406/606 and
dsPIC33FJ64GS406/606 Devices)........................ 54
Change Notification (dsPIC33FJ32GS608/610 and
dsPIC33FJ64GS608/610 Devices)........................ 54
CPU Core ................................................................... 52
DMA............................................................................ 88
ECAN1 (WIN (C1CTRL1) = 0 or 1)............................. 89
ECAN1 (WIN (C1CTRL1) = 0).................................... 89
ECAN1 (WIN (C1CTRL1) = 1).................................... 90
High-Speed 10-Bit ADC Module (dsPIC33FJ32GS608
and dsPIC33FJ64GS608 Devices)........................ 85