Manualshelf

Datasheet

ManualsBrandsMICROCHIP TECHNOLOGY ManualsDev KitsPCB extension board
251252253254255256257258259260
dsPIC33FJ32GS406/606/608/610 and dsPIC33FJ64GS406/606/608/610
DS70000591F-page 256 2009-2014 Microchip Technology Inc.
bit 1 BPLH: Blanking in PWMxL High Enable bit
1 = State blanking (of current-limit and/or Fault input signals) when PWMxL output is high
0 = No blanking when PWMxL output is high
bit 0 BPLL: Blanking in PWMxL Low Enable bit
1 = State blanking (of current-limit and/or Fault input signals) when PWMxL output is low
0 = No blanking when PWMxL output is low
REGISTER 16-23: LEBCONx: LEADING-EDGE BLANKING CONTROL x REGISTER (CONTINUED)
Note 1: The blanking signal is selected via the BLANKSELx bits in the AUXCONx register.