Datasheet

 2009-2014 Microchip Technology Inc. DS70000591F-page 145
dsPIC33FJ32GS406/606/608/610 and dsPIC33FJ64GS406/606/608/610
bit 1 MI2C1IE: I2C1 Master Events Interrupt Enable bit
1 = Interrupt request is enabled
0 = Interrupt request is not enabled
bit 0 SI2C1IE: I2C1 Slave Events Interrupt Enable bit
1 = Interrupt request is enabled
0 = Interrupt request is not enabled
REGISTER 7-14: IEC1: INTERRUPT ENABLE CONTROL REGISTER 1 (CONTINUED)