Datasheet

dsPIC33FJ06GS101/X02 and dsPIC33FJ16GSX02/X04
DS70000318G-page 272  2008-2014 Microchip Technology Inc.
21.5 JTAG Interface
The dsPIC33FJ06GS101/X02 and
dsPIC33FJ16GSX02/X04 devices implement a JTAG
interface, which supports boundary scan device
testing. Detailed information on this interface will be
provided in future revisions of the document.
21.6 In-Circuit Serial Programming
The dsPIC33FJ06GS101/X02 and
dsPIC33FJ16GSX02/X04 family of Digital Signal
Controllers can be serially programmed while in the
end application circuit. This is done with two lines for
clock and data and three other lines for power, ground
and the programming sequence. Serial programming
allows customers to manufacture boards with
unprogrammed devices and then program the Digital
Signal Controller just before shipping the product.
Serial programming also allows the most recent
firmware or a custom firmware to be programmed.
Refer to the “dsPIC33F/PIC24H Flash Programming
Specification” (DS70152) for details about In-Circuit
Serial Programming (ICSP).
Any of the three pairs of programming clock/data pins
can be used:
• PGEC1 and PGED1
• PGEC2 and PGED2
• PGEC3 and PGED3
21.7 In-Circuit Debugger
The dsPIC33FJ06GS101/X02 and
dsPIC33FJ16GSX02/X04 devices provide simple
debugging functionality through the PGECx (Emula-
tion/Debug Clock) and PGEDx (Emulation/Debug
Data) pin functions.
Any of the three pairs of debugging clock/data pins can
be used:
• PGEC1 and PGED1
• PGEC2 and PGED2
• PGEC3 and PGED3
To use the in-circuit debugger function of the device,
the design must implement ICSP connections to
MCLR
, VDD, VSS, and the PGECx/PGEDx pin pair. In
addition, when the feature is enabled, some of the
resources are not available for general use. These
resources include the first 80 bytes of data RAM and
two I/O pins.