Datasheet

 2008-2014 Microchip Technology Inc. DS70000318G-page 185
dsPIC33FJ06GS101/X02 and dsPIC33FJ16GSX02/X04
12.0 TIMER2/3 FEATURES
Timer2 is a Type B timer that offers the following major
features:
• A Type B timer can be concatenated with a
Type C timer to form a 32-bit timer
• External clock input (TxCK) is always synchronized
to the internal device clock and the clock
synchronization is performed after the prescaler.
Figure 12-1 shows a block diagram of the Type B timer.
Timer3 is a Type C timer that offers the following major
features:
• A Type C timer can be concatenated with a
Type B timer to form a 32-bit timer
• The external clock input (TxCK) is always
synchronized to the internal device clock and the clock
synchronization is performed before the prescaler
A block diagram of the Type C timer is shown in
Figure 12-2.
FIGURE 12-1: TYPE B TIMER BLOCK DIAGRAM (x = 2)
FIGURE 12-2: TYPE C TIMER BLOCK DIAGRAM (x = 3)
Note 1: This data sheet summarizes the features
of the dsPIC33FJ06GS101/X02 and
dsPIC33FJ16GSX02/X04 families of
devices. It is not intended to be a
comprehensive reference source. To
complement the information in this data
sheet, refer to “Timers” (DS70205) in
the “dsPIC33F/PIC24H Family Reference
Manual”, which is available on the
Microchip web site (www.microchip.com).
2: Some registers and associated bits
described in this section may not be
available on all devices. Refer to
Section 4.0 “Memory Organization” in
this data sheet for device-specific register
and bit information.
Note: Timer3 is not available on all devices.
Prescaler
(/n)
TGATE
TCS
00
10
x1
TMRx
Comparator
PRx
TGATE
Set TxIF Flag
0
1
Sync
TCKPS<1:0>
Equal
Reset
TxCK
Gate
Sync
F
CY
Falling Edge
Detect
Prescaler
(/n)
TCKPS<1:0>
Prescaler
(/n)
Gate
Sync
TGATE
TCS
00
10
x1
TMRx
Comparator
PRx
FCY
TGATE
Falling Edge
Detect
Set TxIF Flag
0
1
Sync
TCKPS<1:0>
Equal
Reset
TxCK
Prescaler
(/n)
TCKPS<1:0>