Datasheet

© 2007 Microchip Technology Inc. Preliminary DS70165E-page 363
dsPIC33F
IPC7 (Interrupt Priority Control 7) .............................121
IPC8 (Interrupt Priority Control 8) .............................122
IPC9 (Interrupt Priority Control 9) .............................123
NVMCOM (Flash Memory Control).............................79
OCxCON (Output Compare x Control) ..................... 174
OSCCON (Oscillator Control) ...................................152
OSCTUN (FRC Oscillator Tuning)............................ 155
OVDCON (Override Control) ....................................193
PDC1 (PWM Duty Cycle 1)....................................... 194
PDC2 (PWM Duty Cycle 2)....................................... 194
PDC3 (PWM Duty Cycle 3)....................................... 195
PDC4 (PWM Duty Cycle 4)....................................... 195
PLLFBD (PLL Feedback Divisor).............................. 154
PTCON (PWM Time Base Control) .......................... 184
PTMR (PWM Timer Count Value)............................. 185
PTPER (PWM Time Base Period) ............................ 185
PWMCON1 (PWM Control 1) ................................... 187
PWMCON2 (PWM Control 2) ................................... 188
QEICON (QEI Control)..............................................201
RCON (Reset Control)................................................ 84
RSCON (DCI Receive Slot Control).......................... 274
SEVTCMP (Special Event Compare) .......................186
SPIxCON1 (SPIx Control 1)......................................210
SPIxCON2 (SPIx Control 2)......................................211
SPIxSTAT (SPIx Status and Control) ....................... 209
SR (CPU Status)...................................................30, 92
T1CON (Timer1 Control)...........................................162
TSCON (DCI Transmit Slot Control).........................274
TxCON (T2CON, T4CON, T6CON or
T8CON Control)................................................166
TyCON (T3CON, T5CON, T7CON or
T9CON Control)................................................167
UxMODE (UARTx Mode).......................................... 226
UxSTA (UARTx Status and Control).........................228
Reset
Clock Source Selection............................................... 85
Special Function Register Reset States .....................86
Times .......................................................................... 85
Reset Sequence ................................................................. 87
Resets................................................................................. 83
S
Serial Peripheral Interface (SPI) ....................................... 205
Setup for Continuous Output Pulse Generation................ 171
Setup for Single Output Pulse Generation........................ 171
Software Simulator (MPLAB SIM).....................................306
Software Stack Pointer, Frame Pointer
CALLL Stack Frame.................................................... 67
Special Features of the CPU ............................................289
SPI
Master, Frame Master Connection ........................... 207
Master/Slave Connection.......................................... 207
Slave, Frame Master Connection ............................. 208
Slave, Frame Slave Connection ............................... 208
SPI Module
SPI1 Register Map......................................................54
SPI2 Register Map......................................................54
Symbols Used in Opcode Descriptions.............................298
System Control
Register Map............................................................... 66
T
Temperature and Voltage Specifications
AC............................................................................. 316
Timer1............................................................................... 161
Timer2/3, Timer4/5, Timer6/7 and Timer8/9 ..................... 163
Timing Characteristics
CLKO and I/O........................................................... 319
Timing Diagrams
10-bit A/D Conversion (CHPS = 01, SIMSAM = 0,
ASAM = 0, SSRC = 000).................................. 346
10-bit A/D Conversion (CHPS
= 01, SIMSAM =
0, ASAM = 1, SSRC = 111, SAMC =
00001).......................................................... 347
12-bit A/D Conversion (ASAM = 0, SSRC = 000)..... 349
CAN I/O .................................................................... 343
Center-Aligned PWM................................................ 179
DCI AC-Link Mode.................................................... 341
DCI Multi -Channel, I
2
S Modes ................................ 339
Dead-Time................................................................ 180
ECAN Bit .................................................................. 236
Edge-Aligned PWM .................................................. 178
External Clock .......................................................... 317
Frame Sync, AC-Link Start-of-Frame....................... 264
Frame Sync, Multi-Channel Mode ............................ 264
I2Cx Bus Data (Master Mode) .................................. 335
I2Cx Bus Data (Slave Mode) .................................... 337
I2Cx Bus Start/Stop Bits (Master Mode)................... 335
I2Cx Bus Start/Stop Bits (Slave Mode)..................... 337
I
2
S Interface Frame Sync ......................................... 264
Input Capture (CAPx) ............................................... 325
Motor Control PWM .................................................. 327
Motor Control PWM Fault......................................... 327
OC/PWM .................................................................. 326
Output Compare (OCx) ............................................ 325
QEA/QEB Input ........................................................ 328
QEI Module Index Pulse........................................... 329
Reset, Watchdog Timer, Oscillator Start-up
Timer and Power-up Timer............................... 320
SPIx Master Mode (CKE = 0) ................................... 330
SPIx Master Mode (CKE = 1) ................................... 331
SPIx Slave Mode (CKE = 0) ..................................... 332
SPIx Slave Mode (CKE = 1) ..................................... 333
Timer1, 2, 3, 4, 5, 6, 7, 8, 9 External Clock .............. 322
TimerQ (QEI Module) External Clock ....................... 324
Timing Requirements
CLKO and I/O........................................................... 319
DCI AC-Link Mode.................................................... 342
DCI Multi-Channel, I
2
S Modes ................................. 340
External Clock .......................................................... 317
Input Capture............................................................ 325
Timing Specifications
10-bit A/D Conversion Requirements ....................... 348
12-bit A/D Conversion Requirements ....................... 350
CAN I/O Requirements............................................. 343
I2Cx Bus Data Requirements (Master Mode)........... 336
I2Cx Bus Data Requirements (Slave Mode)............. 338
Motor Control PWM Requirements........................... 327
Output Compare Requirements................................ 325
PLL Clock ................................................................. 318
QEI External Clock Requirements............................ 324
QEI Index Pulse Requirements ................................ 329
Quadrature Decoder Requirements ......................... 328
Reset, Watchdog Timer, Oscillator Start-up
Timer, Power-up Timer and Brown-out
Reset Requirements......................................... 321
Simple OC/PWM Mode Requirements ..................... 326
SPIx Master Mode (CKE = 0) Requirements............ 330
SPIx Master Mode (CKE = 1) Requirements............ 331
SPIx Slave Mode (CKE = 0) Requirements.............. 332
SPIx Slave Mode (CKE = 1) Requirements.............. 334
Timer1 External Clock Requirements....................... 322