Datasheet

dsPIC33F
DS70165E-page 360 Preliminary © 2007 Microchip Technology Inc.
Receive Status Bits...................................................267
Sample Clock Edge Control Bit................................. 266
Slave Frame Sync Operation....................................264
Slot Enable Bits Operation with Frame Sync ............266
Slot Status Bits..........................................................268
Synchronous Data Transfers .................................... 266
Transmit Slot Enable Bits.......................................... 266
Transmit Status Bits..................................................267
Transmit/Receive Shift Register ...............................261
Underflow Mode Control Bit ......................................268
Word Size Selection Bits...........................................263
DCI I/O Pins ......................................................................261
COFS ........................................................................261
CSCK ........................................................................261
CSDI .........................................................................261
CSDO........................................................................261
DCI Module
Register Map...............................................................64
Development Support .......................................................305
DMA
Interrupts and Traps.................................................. 138
Request Source Selection ........................................ 138
DMA Module
DMA Register Map......................................................56
DMAC Operating Modes...................................................136
Addressing ................................................................137
Byte or Word Transfer...............................................137
Continuous or One-Shot ...........................................138
Manual Transfer........................................................138
Null Data Peripheral Write ........................................137
Ping-Pong .................................................................138
Transfer Direction .....................................................137
DMAC Registers ...............................................................136
DMAxCNT.................................................................136
DMAxCON ................................................................136
DMAxPAD.................................................................136
DMAxREQ ................................................................136
DMAxSTA .................................................................136
DMAxSTB .................................................................136
DSP Engine.........................................................................33
Multiplier......................................................................35
E
ECAN Module
Baud Rate Setting.....................................................236
ECAN1 Register Map (C1CTRL1.WIN = 0 or 1) .........58
ECAN1 Register Map (C1CTRL1.WIN = 0) ................ 58
ECAN1 Register Map (C1CTRL1.WIN = 1) ................ 59
ECAN2 Register Map (C2CTRL1.WIN = 0 or 1) .........61
ECAN2 Register Map (C2CTRL1.WIN = 0) ..........61, 62
Frame Types.............................................................231
Message Reception ..................................................233
Message Transmission .............................................235
Modes of Operation ..................................................233
Overview ...................................................................231
Electrical Characteristics...................................................309
AC.............................................................................316
Enhanced CAN Module.....................................................231
Equations
A/D Conversion Clock Period ...................................278
Bit Clock Frequency.................................................. 265
Calculating the PWM Period.....................................172
Calculation for Maximum PWM Resolution...............172
COFSG Period..........................................................263
Device Operating Frequency .................................... 150
PWM Period..............................................................178
PWM Resolution....................................................... 178
Relationship Between Device and SPI
Clock Speed ..................................................... 208
Serial Clock Rate...................................................... 213
Time Quantum for Clock Generation........................ 237
UART Baud Rate with BRGH = 0............................. 224
UART Baud Rate with BRGH = 1............................. 224
Errata .................................................................................. 21
F
Flash Program Memory ...................................................... 77
Control Registers........................................................ 78
Operations .................................................................. 78
Programming Algorithm.............................................. 80
RTSP Operation ......................................................... 78
Table Instructions ....................................................... 77
Flexible Configuration....................................................... 289
FSCM
Delay for Crystal and PLL Clock Sources................... 86
Device Resets............................................................. 86
I
I/O Ports............................................................................ 159
Parallel I/O (PIO) ...................................................... 159
Write/Read Timing.................................................... 160
I
2
C
Addresses................................................................. 215
Baud Rate Generator ............................................... 213
General Call Address Support.................................. 215
Interrupts .................................................................. 213
IPMI Support............................................................. 215
Master Mode Operation
Clock Arbitration ............................................... 216
Multi-Master Communication, Bus
Collision and Bus Arbitration .................... 216
Operating Modes...................................................... 213
Registers .................................................................. 213
Slave Address Masking............................................ 215
Slope Control............................................................ 216
Software Controlled Clock Stretching
(STREN = 1)..................................................... 215
I
2
C Module
I2C1 Register Map...................................................... 53
I2C2 Register Map...................................................... 53
I
2
S Mode Operation.......................................................... 269
Data Justification ...................................................... 269
Frame and Data Word Length Selection .................. 269
In-Circuit Debugger........................................................... 295
In-Circuit Emulation .......................................................... 289
In-Circuit Serial Programming (ICSP)....................... 289, 295
Infrared Support
Built-in IrDA Encoder and Decoder........................... 225
External IrDA, IrDA Clock Output ............................. 225
Input Capture
Registers .................................................................. 170
Input Change Notification Module..................................... 160
Instruction Addressing Modes ............................................ 67
File Register Instructions............................................ 67
Fundamental Modes Supported ................................. 68
MAC Instructions ........................................................ 68
MCU Instructions........................................................ 67
Move and Accumulator Instructions............................ 68
Other Instructions ....................................................... 68
Instruction Set
Overview................................................................... 300
Summary .................................................................. 297