Datasheet
© 2007 Microchip Technology Inc. Preliminary DS70165E-page 357
dsPIC33F
APPENDIX A: REVISION HISTORY
Revision A (October 2005)
• Initial release of this document
Revision B (February 2006)
• Updated Register descriptions and memory maps
• Revised Oscillator section
• Updated ADC characteristics
• Updated Thermal Packaging characteristics
Revision C (March 2006)
• Information related to prototype samples removed
• Flash memory characteristics updated
• Incorrect references to SPI FIFO buffers
removed. These buffers are not supported by the
dsPIC33F family.
• DC Characteristics updated
• Device Configuration registers updated
Revision D (July 2006)
• Added FBS and FSS Device Configuration regis-
ters (see Table 23-1) and corresponding bit field
descriptions (see Table 23-2). These added regis-
ters replaced the former RESERVED1 and
RESERVED2 registers.
• Added INTTREG Interrupt Control and Status reg-
ister. (See Section 6.3 “Interrupt Control and
Status Registers”. See also Register 6-33.)
• Added Core Registers BSRAM and SSRAM (see
Section 3.2.8 “Data Ram Protection Feature”)
• Clarified Fail-Safe Clock Monitor operation (see
Section 8.3 “Fail-Safe Clock Monitor (FSCM)”)
• Updated COSC<2:0> and NOSC<2:0> bit config-
urations in OSCCON register (see Register 8-1)
• Updated CLKDIV register bit configurations (see
Register 8-2)
• Added Word Write Cycle Time parameter (T
WW)
to Program Flash Memory (see Table 26-11)
• Noted exceptions to Absolute Maximum Ratings
on I/O pin output current (see Section 26.0
“Electrical Characteristics”)
• Added ADC2 Event Trigger for Timer4/5
(Section 12.0 “Timer2/3, Timer4/5, Timer6/7
and Timer8/9”)
• Corrected mislabeled 2COV bit in I2CxSTAT reg-
ister (see Table 18-1)
• Added QEI Register descriptions (see
Register 16-1 and Register 16-2)
• Corrected mislabeled PMOD<4:1> field in PWM-
CON register (see Register 15-5)
• Corrected mislabeled UPDN_SRC bit in QEICON
register (see Register 16-1)
• Corrected mislabeled I2COV bit in I2CxCON
register (see Register 18-1)
• Removed AD26a, AD27a, AD28a, AD26b,
AD27b, AD28b from Table 26-40 (ADC Module).
Revision E (January 2007)
• This revision includes updates to the packaging
diagrams.