Datasheet

© 2007 Microchip Technology Inc. Preliminary DS70165E-page 317
dsPIC33F
FIGURE 26-2: EXTERNAL CLOCK TIMING
Q1 Q2 Q3 Q4
OSC1
CLKO
Q1 Q2 Q3 Q4
OS20
OS25
OS30 OS30
OS40
OS41
OS31 OS31
TABLE 26-15: EXTERNAL CLOCK TIMING REQUIREMENTS
AC CHARACTERISTICS
Standard Operating Conditions: 2.5V to 3.6V
(unless otherwise stated)
Operating temperature -40°C TA +85°C for Industrial
Param
No.
Symb Characteristic Min Typ
(1)
Max Units Conditions
OS10 F
IN External CLKI Frequency
(External clocks allowed only
in EC and ECPLL modes)
0.8
4
64
8
MHz
MHz
EC
ECPLL
Oscillator Crystal Frequency 3
3
10
10
10
10
40
40
33
MHz
MHz
MHz
MHz
kHz
XT
XTPLL
HS
HSPLL
SOSC
OS20 T
OSC TOSC = 1/FOSC 12.5 DC ns
OS25 TCY Instruction Cycle Time
(2)
25 DC ns
OS30 TosL,
Tos H
External Clock in (OSC1)
High or Low Time
0.625 x TOSC ——nsEC
OS31 TosR,
Tos F
External Clock in (OSC1)
Rise or Fall Time
——TBDnsEC
OS40 TckR CLKO Rise Time
(3)
—6TBDns
OS41 TckF CLKO Fall Time
(3)
—6TBDns
Legend: TBD = To Be Determined
Note 1: Data in “Typ” column is at 3.3V, 25°C unless otherwise stated. Parameters are for design guidance only
and are not tested.
2: Instruction cycle period (T
CY) equals two times the input oscillator time-base period. All specified values
are based on characterization data for that particular oscillator type under standard operating conditions
with the device executing code. Exceeding these specified limits may result in an unstable oscillator
operation and/or higher than expected current consumption. All devices are tested to operate at “min.”
values with an external clock applied to the OSC1/CLKI pin. When an external clock input is used, the
“max.” cycle time limit is “DC” (no clock) for all devices.
3: Measurements are taken in EC mode. The CLKO signal is measured on the OSC2 pin.