Datasheet

dsPIC33F
DS70165E-page 278 Preliminary © 2007 Microchip Technology Inc.
EQUATION 22-1: ADC CONVERSION CLOCK PERIOD
FIGURE 22-3: ADC TRANSFER FUNCTION (10-BIT EXAMPLE)
FIGURE 22-4: ADC CONVERSION CLOCK PERIOD BLOCK DIAGRAM
TAD =
T
CY(ADCS + 1)
ADCS =
T
AD
TCY
– 1
10 0000 0010 (= 514)
10 0000 0011 (= 515)
01 1111 1101 (= 509)
01 1111 1110 (= 510)
01 1111 1111 (= 511)
11 1111 1110 (= 1022)
11 1111 1111 (= 1023)
00 0000 0000 (= 0)
00 0000 0001 (= 1)
Output Code
10 0000 0000 (= 512)
(V
INH – VINL)
V
REFL
VREFH – VREFL
1024
VREFH
VREFL +
10 0000 0001 (= 513)
512 * (V
REFH – VREFL)
1024
VREFL +
1023 * (V
REFH – VREFL)
1024
VREFL +
0
1
ADC Internal
RC Clock
T
OSC
(1)
X2
ADC Conversion
Clock Multiplier
1, 2, 3, 4, 5,..., 64
ADxCON3<15>
TCY
TAD
6
ADxCON3<5:0>
1. Refer to Figure 8-2 for the derivation of FOSC when the PLL is enabled. If the PLL is not used, FOSC is equal to the clock
source frequency. Tosc = 1/Fosc.