Datasheet

© 2007 Microchip Technology Inc. Preliminary DS70165E-page 23
dsPIC33F
1.0 DEVICE OVERVIEW
This document contains device specific information for
the following devices:
• dsPIC33FJ64GP206
• dsPIC33FJ64GP306
• dsPIC33FJ64GP310
• dsPIC33FJ64GP706
• dsPIC33FJ64GP708
• dsPIC33FJ64GP710
• dsPIC33FJ128GP206
• dsPIC33FJ128GP306
• dsPIC33FJ128GP310
• dsPIC33FJ128GP706
• dsPIC33FJ128GP708
• dsPIC33FJ128GP710
• dsPIC33FJ256GP506
• dsPIC33FJ256GP510
• dsPIC33FJ256GP710
• dsPIC33FJ64MC506
• dsPIC33FJ64MC508
• dsPIC33FJ64MC510
• dsPIC33FJ64MC706
• dsPIC33FJ64MC710
• dsPIC33FJ128MC506
• dsPIC33FJ128MC510
• dsPIC33FJ128MC706
• dsPIC33FJ128MC708
• dsPIC33FJ128MC710
• dsPIC33FJ256MC510
• dsPIC33FJ256MC710
The dsPIC33F General Purpose and Motor Control
Families of devices include devices with a wide range
of pin counts (64, 80 and 100), different program
memory sizes (64 Kbytes, 128 Kbytes and 256 Kbytes)
and different RAM sizes (8 Kbytes, 16 Kbytes and
30 Kbytes)
This makes these families suitable for a wide variety of
high-performance digital signal control application. The
devices are pin compatible with the PIC24H family of
devices, and also share a very high degree of compatibil-
ity with the dsPIC30F family devices. This allows easy
migration between device families as may be necessi-
tated by the specific functionality, computational
resource and system cost requirements of the applica-
tion.
The dsPIC33F device family employs a powerful 16-bit
architecture that seamlessly integrates the control
features of a Microcontroller (MCU) with the
computational capabilities of a Digital Signal Processor
(DSP). The resulting functionality is ideal for
applications that rely on high-speed, repetitive
computations, as well as control.
The DSP engine, dual 40-bit accumulators, hardware
support for division operations, barrel shifter, 17 x 17
multiplier, a large array of 16-bit working registers and
a wide variety of data addressing modes, together
provide the dsPIC33F Central Processing Unit (CPU)
with extensive mathematical processing capability.
Flexible and deterministic interrupt handling, coupled
with a powerful array of peripherals, renders the
dsPIC33F devices suitable for control applications.
Further, Direct Memory Access (DMA) enables
overhead-free transfer of data between several
peripherals and a dedicated DMA RAM. Reliable, field
programmable Flash program memory ensures
scalability of applications that use dsPIC33F devices.
Figure 1-1 shows a general block diagram of the
various core and peripheral modules in the dsPIC33F
family of devices, while Table 1-1 lists the functions of
the various pins shown in the pinout diagrams.
Note: This data sheet summarizes the features
of this group of dsPIC33F devices. It is not
intended to be a comprehensive reference
source. To complement the information in
this data sheet, refer to the “dsPIC30F
Family Reference Manual” (DS70046).