Datasheet

dsPIC33F
DS70165E-page 224 Preliminary © 2007 Microchip Technology Inc.
19.1 UART Baud Rate Generator (BRG)
The UART module includes a dedicated 16-bit Baud
Rate Generator. The BRGx register controls the period
of a free-running 16-bit timer. Equation 19-1 shows the
formula for computation of the baud rate with
BRGH = 0.
EQUATION 19-1: UART BAUD RATE WITH
BRGH = 0
Example 19-1 shows the calculation of the baud rate
error for the following conditions:
•F
CY = 4 MHz
• Desired Baud Rate = 9600
The maximum baud rate (BRGH = 0) possible is
F
CY/16 (for BRGx = 0), and the minimum baud rate
possible is F
CY/(16 * 65536).
Equation 19-2 shows the formula for computation of
the baud rate with BRGH = 1.
EQUATION 19-2: UART BAUD RATE WITH
BRGH =
1
The maximum baud rate (BRGH = 1) possible is F
CY/4
(for BRGx = 0), and the minimum baud rate possible is
F
CY/(4 * 65536).
Writing a new value to the BRGx register causes the
BRG timer to be reset (cleared). This ensures the BRG
does not wait for a timer overflow before generating the
new baud rate.
EXAMPLE 19-1: BAUD RATE ERROR CALCULATION (BRGH = 0)
Note: FCY denotes the instruction cycle clock
frequency (F
OSC/2).
Baud Rate =
F
CY
16 • (BRGx + 1)
FCY
16 • Baud Rate
BRGx =
– 1
Note: FCY denotes the instruction cycle clock
frequency (F
OSC/2).
Baud Rate =
F
CY
4 • (BRGx + 1)
FCY
4 • Baud Rate
BRGx =
– 1
Desired Baud Rate = FCY/(16 (BRGx + 1))
Solving for BRGx Value:
BRGx = ((F
CY/Desired Baud Rate)/16) – 1
BRGx = ((4000000/9600)/16) – 1
BRGx = 25
Calculated Baud Rate = 4000000/(16 (25 + 1))
= 9615
Error = (Calculated Baud Rate – Desired Baud Rate)
Desired Baud Rate
= (9615 – 9600)/9600
=0.16%