Datasheet

dsPIC33F
DS70165E-page 208 Preliminary © 2007 Microchip Technology Inc.
FIGURE 17-5: SPI SLAVE, FRAME MASTER CONNECTION DIAGRAM
FIGURE 17-6: SPI SLAVE, FRAME SLAVE CONNECTION DIAGRAM
EQUATION 17-1: RELATIONSHIP BETWEEN DEVICE AND SPI CLOCK SPEED
TABLE 17-1: SAMPLE SCKx FREQUENCIES
FCY = 40 MHz
Secondary Prescaler Settings
1:1 2:1 4:1 6:1 8:1
Primary Prescaler Settings 1:1 Invalid Invalid 10000 6666.67 5000
4:1 10000 5000 2500 1666.67 1250
16:1 2500 1250 625 416.67 312.50
64:1 625 312.5 156.25 104.17 78.125
F
CY = 5 MHz
Primary Prescaler Settings 1:1 5000 2500 1250 833 625
4:1 1250 625 313 208 156
16:1 313 156 78 52 39
64:17839201310
Note: SCKx frequencies shown in kHz.
SDOx
SDIx
dsPIC33F
Serial Clock
SSx
SCKx
Frame Sync
Pulse
SDIx
SDOx
PROCESSOR 2
SSx
SCKx
(SPI Slave, Frame Slave)
SDOx
SDIx
dsPIC33F
Serial Clock
SSx
SCKx
Frame Sync
Pulse
SDIx
SDOx
PROCESSOR 2
SSx
SCKx
(SPI Master, Frame Slave)
Primary Prescaler * Secondary Prescaler
F
CY
FSCK =