Datasheet

© 2007 Microchip Technology Inc. Preliminary DS70165E-page 173
dsPIC33F
TABLE 14-1: EXAMPLE PWM FREQUENCIES AND RESOLUTIONS AT 4 MIPS (FCY = 4 MHz)
TABLE 14-2: EXAMPLE PWM FREQUENCIES AND RESOLUTIONS AT 16 MIPS (F
CY = 16 MHz)
TABLE 14-3: EXAMPLE PWM FREQUENCIES AND RESOLUTIONS AT 40 MIPS (F
CY = 40 MHz)
FIGURE 14-1: OUTPUT COMPARE MODULE BLOCK DIAGRAM
PWM Frequency 7.6 Hz 61 Hz 122 Hz 977 Hz 3.9 kHz 31.3 kHz 125 kHz
Timer Prescaler Ratio 8111111
Period Register Value FFFFh FFFFh 7FFFh 0FFFh 03FFh 007Fh 001Fh
Resolution (bits) 16 16 15 12 10 7 5
PWM Frequency 30.5 Hz 244 Hz 488 Hz 3.9 kHz 15.6 kHz 125 kHz 500 kHz
Timer Prescaler Ratio 8111111
Period Register Value FFFFh FFFFh 7FFFh 0FFFh 03FFh 007Fh 001Fh
Resolution (bits) 16 16 15 12 10 7 5
PWM Frequency 76 Hz 610 Hz 1.22 Hz 9.77 kHz 39 kHz 313 kHz 1.25 MHz
Timer Prescaler Ratio 8111111
Period Register Value FFFFh FFFFh 7FFFh 0FFFh 03FFh 007Fh 001Fh
Resolution (bits) 16 16 15 12 10 7 5
Note: Only OC1 and OC2 can trigger a DMA data transfer.
OCxR
(1)
Comparator
Output
Logic
OCM2:OCM0
Output Enable
OCx
(1)
Set Flag bit
OCxIF
(1)
OCxRS
(1)
Mode Select
3
Note 1:Where ‘x’ is shown, reference is made to the registers associated with the respective output compare channels 1
through 8.
2: OCFA pin controls OC1-OC4 channels. OCFB pin controls OC5-OC8 channels.
3: Each output compare channel can use one of two selectable time bases. Refer to the device data sheet for the
time bases associated with the module.
OCTSEL
0
1
16 16
OCFA or OCFB
(2)
TMR register inputs
from time bases
(3)
Period match signals
from time bases
(3)
0
1
QS
R