Datasheet

© 2008 Microchip Technology Inc. DS01208A-page 3
AN1208
A NOVEL APPROACH FOR DIGITAL IMPLEMENTATION OF PFC AND SENSORLESS FOC ALGORITHMS
Figure 2 shows a block diagram of the PFC and Sensorless FOC control loops implemented digitally using the dsPIC DSC device.
FIGURE 2: DIGITAL PFC AND SENSORLESS FOC BLOCK DIAGRAM
Speed
Control
I
d
Control
Bridge
Rectifier
Boost Converter
Three-Phase Inverter
Voltage
Control
PWM
Current
Control
++
I
q
Control
+
+
+
d -q
to
SVM PWM
ω / Θ
Estimator
α − β
to
d -
q
a, b, c
to
α − β
PWM
ω
VAC
V
AC
V
DC
PWM
I
AC
1
V
AVG
V
AVG
+
+
+
+
+
V
α
V
β
I
α
I
β
I
q
I
d
I
a
I
b
0
2
Φ Stator System
3
Φ Stator System2 Φ Rotor System
ω
Ref
V
DCREF
1 Φ
AC
a
b
c
+
–
Sensorless Field Oriented Control (FOC) System
Power Factor Correction (PFC)
Θ
Θ
α − β