Datasheet

© 2005 Microchip Technology Inc. DS70043F-page 81
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Pin Diagrams
U1RX
U1TX
U1ARX
U1ATX
U2RX
U2TX
I
O
I
O
I
O
ST
—
ST
—
ST
—
UART1 Receive.
UART1 Transmit.
UART1 Alternate Receive.
UART1 Alternate Transmit.
UART2 Receive.
UART2 Transmit.
V
DD P — Positive supply for logic and I/O pins.
VSS P — Ground reference for logic and I/O pins.
V
REF+ I Analog Analog Voltage Reference (High) input.
VREF- I Analog Analog Voltage Reference (Low) input.
TABLE B-1: PINOUT I/O DESCRIPTIONS FOR MOTOR CONTROL FAMILY (CONTINUED)
Pin Name
Pin
Type
Buffer
Type
Description
Legend: CMOS = CMOS compatible input or output Analog = Analog input
ST = Schmitt Trigger input with CMOS levels O = Output I = Input P = Power
MCLR
PWM1L/RE0
PWM1H/RE1
PWM2L/RE2
PWM2H/RE3
PWM3L/RE4
PWM3H/RE5V
SS
VDD
EMUD3/AN0/VREF+/CN2/RB0
EMUC3/AN1/V
REF-/CN3/RB1
AV
DD
AVSS
AN2/SS1/CN4/RB2
EMUD2/OC2/IC2/INT2/RD1
EMUC2/OC1/IC1/INT1/RD0
EMUC1/SOSCO/T1CK/U1ARX/CN0/RC14
EMUD1/SOSCI/T2CK/U1ATX/CN1//RC13
V
SS
OSC2/CLKO/RC15
OSC1/CLKI V
DD
FLTA/INT0/SCK1/OCFA/RE8
PGC/EMUC/U1RX/SDI1/SDA/RF2
PGD/EMUD/U1TX/SDO1/SCL/RF3
AN5/QEB/IC8/CN7/RB5
AN4/QEA/IC7/CN6/RB4
AN3/INDX/CN5/RB3
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
28-Pin PDIP and SOIC
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MCLR
PWM1L/RE0
PWM1H/RE1
PWM2L/RE2
PWM2H/RE3
PWM3L/RE4
PWM3H/RE5V
SS
VDD
EMUD3/AN0/VREF+/CN2/RB0
EMUC3/AN1/V
REF-/CN3/RB1
AV
DD
AVSS
AN2/SS1/CN4/RB2
EMUD2/OC2/IC2/INT2/RD1
EMUC2/OC1/IC1/INT1/RD0
EMUC1/SOSCO/T1CK/U1ARX/CN0/RC14
EMUD1/SOSCI/T2CK/U1ATX/CN1//RC13
V
SS
OSC2/CLKO/RC15
OSC1/CLKI
V
DD
FLTA/INT0/SCK1/OCFA/RE8
PGC/EMUC/U1RX/SDI1/SDA/C1RX/RF2
PGD/EMUD/U1TX/SDO1/SCL/C1TX/RF3
AN5/QEB/IC8/CN7/RB5
AN4/QEA/IC7/CN6/RB4
AN3/INDX/CN5/RB3
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
28-Pin PDIP and SOIC
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