Datasheet
dsPIC30F
DS70043F-page 40 © 2005 Microchip Technology Inc.
TABLE 10-8: COMPARE/SKIP INSTRUCTIONS
Assembly Syntax Description Words Cycles
BTSC f,#bit4 Bit test f, skip if clear 1 1 (2 or 3)
BTSC Ws,#bit4 Bit test Ws, skip if clear 1 1 (2 or 3)
BTSS f,#bit4 Bit test f, skip if set 1 1 (2 or 3)
BTSS Ws,#bit4 Bit test Ws, skip if set 1 1 (2 or 3)
CP f Compare (f – WREG) 1 1
CP Wb,#lit5 Compare (Wb – lit5) 1 1
CP Wb,Ws Compare (Wb – Ws) 1 1
CP0 f Compare (f – 0x0000) 1 1
CP0 Ws Compare (Ws – 0x0000) 1 1
CPB f Compare with Borrow (f – WREG – C
)11
CPB Wb,#lit5 Compare with Borrow (Wb – lit5 – C
)11
CPB Wb,Ws Compare with Borrow (Wb – Ws – C
)11
CPSEQ Wb,Wn Compare Wb with Wn, Skip if Equal (Wb = Wn) 1 1 (2 or 3)
CPSGT Wb,Wn Signed Compare Wb with Wn, Skip if Greater Than (Wb > Wn) 1 1 (2 or 3)
CPSLT Wb,Wn Signed Compare Wb with Wn, Skip if Less Than (Wb < Wn) 1 1 (2 or 3)
CPSNE Wb,Wn Signed Compare Wb with Wn, Skip if Not Equal (Wb ≠ Wn) 11 (2 or 3)
Note 1: Bit positions are specified by bit4 (0:15) for word operations.
2: Conditional skip instructions execute in 1 cycle if the skip is not taken, 2 cycles if the skip is taken over a
one-word instruction and 3 cycles if the skip is taken over a two-word instruction.