Datasheet

dsPIC30F
DS70043F-page 38 © 2005 Microchip Technology Inc.
TABLE 10-5: LOGIC INSTRUCTIONS
Assembly Syntax Description Words Cycles
AND f {,WREG} Destination = f .AND. WREG 1 1
AND #lit10,Wn Wn = lit10 .AND. Wn 1 1
AND Wb,#lit5,Wd Wd = Wb .AND. lit5 1 1
AND Wb,Ws,Wd Wd = Wb .AND. Ws 1 1
CLR f f = 0x0000 1 1
CLR WREG WREG = 0x0000 1 1
CLR Wd Wd = 0x0000 1 1
COM f {,WREG} Destination = f
11
COM Ws,Wd Wd = Ws
11
IOR f {,WREG} Destination = f .IOR. WREG 1 1
IOR #lit10,Wn Wn = lit10 .IOR. Wn 1 1
IOR Wb,#lit5,Wd Wd = Wb .IOR. lit5 1 1
IOR Wb,Ws,Wd Wd = Wb .IOR. Ws 1 1
NEG f {,WREG} Destination = f
+ 1 1 1
NEG Ws,Wd Wd = Ws
+ 1 1 1
SETM f f = 0xFFFF 1 1
SETM WREG WREG = 0xFFFF 1 1
SETM Wd Wd = 0xFFFF 1 1
XOR f {,WREG} Destination = f .XOR. WREG 1 1
XOR #lit10,Wn Wn = lit10 .XOR. Wn 1 1
XOR Wb,#lit5,Wd Wd = Wb .XOR. lit5 1 1
XOR Wb,Ws,Wd Wd = Wb .XOR. Ws 1 1
Note: When the optional {,WREG} operand is specified, the destination of the instruction is WREG. When
{,WREG} is not specified, the destination of the instruction is the file register f.