Datasheet

© 2005 Microchip Technology Inc. DS70043F-page 37
dsPIC30F
TABLE 10-4: MATH INSTRUCTIONS
Assembly Syntax Description Words Cycles
ADD f {,WREG} Destination = f + WREG 1 1
ADD #lit10,Wn Wn = lit10 + Wn 1 1
ADD Wb,#lit5,Wd Wd = Wb + lit5 1 1
ADD Wb,Ws,Wd Wd = Wb + Ws 1 1
ADDC f {,WREG} Destination = f + WREG + (C) 1 1
ADDC #lit10,Wn Wn = lit10 + Wn + (C) 1 1
ADDC Wb,#lit5,Wd Wd = Wb + lit5 + (C) 1 1
ADDC Wb,Ws,Wd Wd = Wb + Ws + (C) 1 1
DAW.B Wn Wn = decimal adjust Wn 1 1
DEC f {,WREG} Destination = f – 1 1 1
DEC Ws,Wd Wd = Ws – 1 1 1
DEC2 f {,WREG} Destination = f – 2 1 1
DEC2 Ws,Wd Wd = Ws – 2 1 1
DIV.S Wm,Wn Signed 16/16-bit integer divide* 118
DIV.SD Wm,Wn Signed 32/16-bit integer divide* 118
DIV.U Wm,Wn Unsigned 16/16-bit integer divide* 118
DIV.UD Wm,Wn Unsigned 32/16-bit integer divide* 118
DIVF Wm,Wn Signed 16/16-bit fractional divide* 118
INC f {,WREG} Destination = f + 1 1 1
INC Ws,Wd Wd = Ws + 1 1 1
INC2 f {,WREG} Destination = f + 2 1 1
INC2 Ws,Wd Wd = Ws + 2 1 1
MUL f W3:W2 = f * WREG 1 1
MUL.SS Wb,Ws,Wnd {Wnd+1,Wnd} = sign(Wb) * sign(Ws) 1 1
MUL.SU Wb,#lit5,Wnd {Wnd+1,Wnd} = sign(Wb) * unsign(lit5) 1 1
MUL.SU Wb,Ws,Wnd {Wnd+1,Wnd} = sign(Wb) * unsign(Ws) 1 1
MUL.US Wb,Ws,Wnd {Wnd+1,Wnd} = unsign(Wb) * sign(Ws) 1 1
MUL.UU Wb,#lit5,Wnd {Wnd+1,Wnd} = unsign(Wb) * unsign(lit5) 1 1
MUL.UU Wb,Ws,Wnd {Wnd+1,Wnd} = unsign(Wb) * unsign(Ws) 1 1
SE Ws,Wnd Wnd = sign-extended Ws 1 1
SUB f {,WREG} Destination = f – WREG 1 1
SUB #lit10, Wn Wn = Wn – lit10 1 1
SUB Wb,#lit5,Wd Wd = Wb – lit5 1 1
SUB Wb,Ws,Wd Wd = Wb – Ws 1 1
SUBB f {,WREG} Destination = f – WREG – (C) 1 1
SUBB #lit10, Wn Wn = Wn – lit10 – (C) 1 1
SUBB Wb,#lit5,Wd Wd = Wb – lit5 – (C
)11
SUBB Wb,Ws,Wd Wd = Wb – Ws – (C
)11
SUBBR f {,WREG} Destination = WREG – f – (C
)11
SUBBR Wb,#lit5,Wd Wd = lit5 – Wb – (C
)11
SUBBR Wb,Ws,Wd Wd = Ws – Wb – (C
)11
SUBR f {,WREG} Destination = WREG – f 1 1
SUBR Wb,#lit5,Wd Wd = lit5 – Wb 1 1
SUBR Wb,Ws,Wd Wd = Ws – Wb 1 1
ZE Ws,Wnd Wnd = zero-extended Ws 1 1
* Divide instructions are interruptible on a cycle-by-cycle basis. Also, divide instructions must be accompanied by a
REPEAT instruction, which adds 1 extra cycle.