Datasheet

dsPIC30F
DS70043F-page 34 © 2005 Microchip Technology Inc.
10.0 dsPIC30F INSTRUCTION SET
10.1 Introduction
The dsPIC30F instruction set provides a broad suite of
instructions, which supports traditional microcontroller
applications, and a class of instructions, which
supports math intensive applications. Since almost all
of the functionality of the PICmicro instruction set has
been maintained, this hybrid instruction set allows a
friendly DSP migration path for users already familiar
with the PICmicro
®
microcontroller.
10.2 Instruction Set Overview
The dsPIC30F instruction set contains 84 instructions,
which can be grouped into the ten functional categories
shown in Table 10-1. Table 10-2 defines the symbols
used in the instruction summary tables, Table 10-3
through Table 10-12. These tables define the syntax,
description, storage and execution requirements
for each instruction. Storage requirements are repre-
sented in 24-bit instruction words, and execution
requirements are represented in instruction cycles.
Most instructions have several different addressing
modes and execution flows, which require different
instruction variants. For instance, there are six unique
ADD instructions and each instruction variant has its
own instruction encoding.
TABLE 10-1: dsPIC30F INSTRUCTION
GROUPS
10.2.1 MULTI-CYCLE INSTRUCTIONS
As the instruction summary tables show, most
instructions execute in a single cycle, with the following
exceptions:
Instructions DO, MOV.D, POP.D, PUSH.D,
TBLRDH, TBLRDL, TBLWTH and TBLWTL
require 2 cycles to execute.
Instructions DIVF, DIV.S, DIV.U are single-
cycle instructions, which should be executed 18
consecutive times as the target REPEAT
instruction.
Instructions that change the program counter also
require 2 cycles to execute, with the extra cycle
executed as a NOP. SKIP instructions, which skip
over a 2-word instruction, require 3 instruction
cycles to execute, with 2 cycles executed as a
NOP.
•The RETFIE, RETLW and RETURN are a
special case of an instruction that changes the
program counter. These execute in 3 cycles,
unless an exception is pending, and then they
execute in 2 cycles.
10.2.2 MULTI-WORD INSTRUCTIONS
As the instruction summary tables show, almost all
instructions consume one instruction word (24 bits),
with the exception of the CALL, DO and GOTO
instructions, which are flow instructions listed in
Table 10-9. These instructions require two words of
memory because their opcodes embed large literal
operands.
Functional Group Summary Table
Move Instructions Table 10-3
Math Instructions Table 10-4
Logic Instructions Table 10-5
Rotate/Shift Instructions Table 10-6
Bit Instructions Table 10-7
Compare/Skip Instructions Table 10-8
Program Flow Instructions Table 10-9
Shadow/Stack Instructions Table 10-10
Control Instructions Table 10-11
DSP Instructions Table 10-12
Note: Instructions that access program memory
as data, using Program Space Visibility,
incur some cycle count overhead. See the
dsPIC30F Family Reference Manual
(DS70046) for details.