Datasheet

dsPIC30F
DS70043F-page 32 © 2005 Microchip Technology Inc.
9.9 UART Module
The UART is a full-duplex asynchronous system that
can communicate with peripheral devices, such as
personal computers, RS-232, and RS-485 interfaces.
The dsPIC30F devices have one or more UART’s.
The key features of the UART module are:
• Full-duplex operation with 8- or 9-bit data
• Even, Odd or No Parity options (for 8-bit data)
• One or two Stop bits
• Fully integrated Baud Rate Generator with 16-bit
prescaler
• Baud rates range from up to 2.5 Mbps and down
to 38 Hz at 30 MIPs
• 4-character deep transmit data buffer
• 4-character deep receive data buffer
• Parity, Framing and Buffer Overrun error detection
• 16x Baud Clock output for IrDA
®
support
• Support for interrupt on Address Detect
(9th bit = 1)
• Separate Transmit and Receive interrupts:
- On transmission of 1 or 4 characters
- On reception of 1, 3 and 4 characters
• Loopback mode for diagnostics
• Alternate TX/RX pins on smaller pin count
devices, for efficient pin utilization.
9.10 I
2
C
TM
Module
The I
2
C module is a synchronous serial interface,
useful for communicating with other peripheral or
microcontroller devices. These peripheral devices may
be Serial EEPROMs, shift registers, display drivers,
A/D converters, etc.
The Inter-Integrated Circuit (I
2
C) module offers full
hardware support for both Slave and Multi-Master
operations.
The key features of the I
2
C module are:
•I
2
C Slave operation supports 7- and 10-bit address.
•I
2
C Master operation supports 7- and 10-bit
address.
•I
2
C port allows bidirectional transfers between
master and slaves.
• Serial clock synchronization for I
2
C port can be
used as a handshake mechanism to suspend and
resume serial transfer (serial clock stretching).
•I
2
C supports Multi-Master operation. Detects bus
collision and will arbitrate accordingly.
• Slew Rate Control for 100 kHz and 400 kHz bus
speeds.
In I
2
C mode, pin SCL is clock and pin SDA is data. The
module will override the data direction bits for these
pins.
9.11 Controller Area Network (CAN)
Module
The Controller Area Network (CAN) module is a serial
interface useful for communicating with other CAN
modules or microcontroller devices. This interface/
protocol was designed to allow communications within
noisy environments.
The CAN module is a communication controller
implementing the CAN 2.0 A/B protocol, as defined in
the BOSCH specification. The module supports CAN
1.2, CAN 2.0A, CAN2.0B Passive and CAN 2.0B Active
versions of the protocol. Details of these protocols can
be found in the BOSCH CAN specification.
The CAN module features:
• Implementation of the CAN protocol CAN 1.2,
CAN 2.0A and CAN 2.0B
• Standard and extended data frames
• Data lengths of 0-8 bytes
• Programmable bit rate up to 1 Mbit/sec
• Support for remote frames
• Double buffered receiver with two prioritized
received message storage buffers (each buffer
may contain up to 8 bytes of data)
• Six full (standard/extended identifier) acceptance
filters, two associated with the high priority
receive buffer, and four associated with the low
priority receive buffer
• Two full acceptance filter masks, one each
associated with the high and low priority receive
buffers
• Three transmit buffers with application specified
prioritization and abort capability (each buffer may
contain up to 8 bytes of data)
• Programmable wake-up functionality with
integrated low pass filter
• Programmable Loopback mode supports self-test
operation
• Signaling via interrupt capabilities for all CAN
receiver and transmitter error states
• Programmable clock source
• Programmable link to Timer module for time-
stamping and network synchronization
• Low-power Sleep and Idle mode
The CAN Bus module consists of a protocol engine and
message buffering/control. The CAN protocol engine
handles all functions for receiving and transmitting
messages on the CAN bus. Messages are transmitted
by first loading the appropriate data registers. Status
and errors can be checked by reading the appropriate
registers. Any message detected on the CAN bus is
checked for errors and then matched against filters to
see if it should be received and stored in one of the
receive registers.