Datasheet

© 2005 Microchip Technology Inc. DS70043F-page 27
dsPIC30F
FIGURE 9-2: 8-OUTPUT PWM MODULE BLOCK DIAGRAM
PDC4
PDC4 Buffer
PWMCON1
PTPER Buffer
PWMCON2
PTPER
PTMR
Comparator
Comparator
Channel 4 Dead-Time
Generator and
PTCON
SEVTCMP
Comparator
Special Event Trigger
FLTBCON
OVDCON
PWM Enable and Mode SFRs
PWM Manual
Control SFR
Channel 3 Dead-Time
Generator and
Channel 2 Dead-Time
Generator and
PWM Generator
#3
PWM Generator
#2
PWM Generator #4
SEVTDIR
PTDIR
DTCON1 Dead-Time Control SFRs
Special Event
Postscaler
PWM1L
PWM1H
PWM2L
PWM2H
PWM3L
PWM3H
PWM Generator
#1
Channel 1 Dead-Time
Generator and
Note: Details of PWM Generator #1, #2 and #3 not shown for clarity.
16-bit Data Bus
PWM4L
PWM4H
DTCON2
FLTACON Fault Pin Control SFRs
PWM time base
Output
Driver
Block
FLTB
FLTA
Override Logic
Override Logic
Override Logic
Override Logic