Datasheet

dsPIC30F
DS70043F-page 24 © 2005 Microchip Technology Inc.
9.0 dsPIC30F PERIPHERALS
The Digital Signal Controller (DSC) family of 16-bit
MCU devices provides the integrated functionality of
many peripherals. Specific peripheral functions
include:
Analog-to-Digital Converters:
- 10-bit high-speed A/D Converter
- 12-bit high-resolution A/D Converter
General Purpose 16-bit timers
Motor Control PWM module
Quadrature Encoder module
Input Capture module
Output Compare/PWM module
Data Converter Interface
Serial Peripheral Interface (SPI
TM
) module
•UART module
•I
2
C
TM
module
Controller Area Network (CAN) module
I/O pins
9.1 Analog-to-Digital Converters
The Analog-to-Digital (A/D) Converters provide up to
16 analog inputs with both single-ended and differential
inputs. These modules offer on-board sample and hold
circuitry.
To minimize control loop errors due to finite update
times (conversion plus computations), a high-speed
low-latency ADC is required.
In addition, several hardware features have been
included in the peripheral interface to improve real-time
performance in a typical DSP-based application.
Result alignment options
Automated sampling
Automated channel scanning
Dual Port data buffer
External conversion start control
There are two versions of A/D converters available for
the dsPIC30F family of devices:
10-bit high-speed A/D module
12-bit high-resolution A/D module
9.1.1 10-BIT HIGH-SPEED A/D MODULE
10-bit resolution
Unipolar differential sample/hold amplifiers
Up to 16 input channels
Selectable reference inputs:
-External V
REF+ and VREF- pins available
±1 LSB max. Differential Non-Linearity (DNL)
(5V ±10%)
±1 LSB max. Integral Non-Linearity (INL)
(5V ±10%)
Four on-chip sample and hold amplifiers:
- Enables simultaneous sampling of 2 or 4
analog inputs
Automated channel scanning
Single supply operation: 2.7-5.5V
1 Msps sampling rate at 5V
Ability to convert during CPU Sleep and Idle
modes
Conversion start can be manual or synchronized
with 1 of 4 trigger sources (Automatic, Timer3,
External Interrupt, PWM period match)
16-word deep memory-mapped result buffer:
- Lower and upper half of buffer can be filled
on alternate conversions
9.1.2 12-BIT HIGH RESOLUTION A/D
MODULE
12-bit resolution
Unipolar differential sample/hold amplifiers
Up to 16 input channels:
-External V
REF+ and VREF- pins available
Selectable reference inputs
±1 LSB max. DNL (5V ±10%)
±1 LSB max. INL (5V ±10%)
One on-chip sample and hold amplifier
Automated channel scanning
Single supply operation: 2.7-5.5V
200 ksps sampling rate at 5V
Ability to convert during CPU Sleep and Idle
modes
Conversion start can be manual or synchronized
with 1 of 3 trigger sources (Automatic, Timer3,
External Interrupt)
16-word deep memory-mapped result buffer:
- Lower and upper half of buffer can be filled
on alternate conversions