Datasheet

dsPIC30F

8.0 DEVICE POWER

MANAGEMENT

Power management services provided by the

dsPIC30F device include:

• Real-time Clock Source Switching

• Programmable low-voltage detection

• Idle and Sleep modes with fast wake-up

8.1 Real-Time Clock Source Switching

Configuration bits determine the clock source upon

Power-on Reset (POR) and Brown-out Reset (BOR).

Thereafter, the clock source can be changed between

permissible clock sources. The OSCCON register

controls the clock switching and reflects system clock

related Status bits. To reduce power consumption, the

user can switch to a slower clock source.

8.2 Low Voltage Detect (LVD)

The LVD module is used with battery operated

applications to detect when the battery voltage (the

VDD of the device) drops below a threshold, which is

near the end of the battery life for the application. The

LVD allows the application to gracefully shut down its

operation.

This feature is only available on some devices.

Figure 8-1 is a block diagram of the LVD module. A

comparator uses an internally generated reference

voltage as the set point. When the selected tap output

of the device voltage is lower than the reference

voltage, the LVD interrupt flag is set. Each node of the

resistor divider represents a “trip point” voltage. The

voltage is software programmable to any of 16 values,

or can be obtained from an external pin (LVDIN).

FIGURE 8-1: LVD MODULE BLOCK

DIAGRAM

LVDEN

16 to 1 MUX

VDD

LVDIN

External LVD

LVDL<3.0>

LVDIF

Internally Generated

Reference Voltage

Input pin