Datasheet

dsPIC30F
DS70043F-page 10 © 2005 Microchip Technology Inc.
5.2 Programmer’s Model
The programmer’s model, shown in Figure 5-2,
consists of 16 x 16-bit working registers (W0 through
W15), 2 x 40-bit accumulators (ACCA and ACCB),
STATUS Register (SR), Data Table Page register
(TBLPAG), Program Space Visibility Page register
(PSVPAG), DO and REPEAT registers (DOSTART,
DOEND, DCOUNT and RCOUNT) and Program
Counter (PC). The working registers can act as data,
address or offset registers. All registers are memory
mapped. W0 is the W register for all instructions that
perform file register addressing.
Some of these registers have a shadow register
associated with them (see the legend in Figure 5-2).
The shadow register is used as a temporary holding
register and can transfer its contents to or from its host
register upon some event occurring in a single cycle.
None of the shadow registers are accessible directly.
When a byte operation is performed on a working
register, only the Least Significant Byte of the target
register is affected. However, a benefit of memory
mapped working registers is that both the Least and
Most Significant Bytes can be manipulated through
byte wide data memory space accesses.
W15 is the dedicated software Stack Pointer (SP). It is
automatically modified by exception processing and
subroutine calls and returns. However, W15 can be
referenced by any instruction in the same manner as all
other W registers. This simplifies the reading, writing
and manipulation of the Stack Pointer (e.g., creating
stack frames).
W14 has been dedicated as a Stack Frame Pointer, as
defined by the LNK and ULNK instructions. However,
W14 can be referenced by any instruction in the same
manner as all other W registers.
The Stack Pointer always points to the first available
free word and grows from lower addresses towards
higher addresses. It pre-decrements for stack pops
(reads) and post-increments for stack pushes (writes).