Datasheet

16-bit Non-PCI Small Form Factor 10/100 Ethernet Controller with Variable Voltage I/O & HP Auto-MDIX Support
Datasheet
SMSC LAN9220 151 Revision 2.9 (03-01-12)
DATASHEET
Rev. 2.3
(08-18-08)
Note 7.7 on page 145 Note following I/O Buffer Characteristics table
modified:
Changed from: ".....the per-pin input leakage is 10
divided by the maximum input leakage current."
to: ".....the per-pin input leakage is the maximum
input leakage current divided by 10."
Rev. 2.2
(06-19-08)
Figure 1.2, "Internal Block
Diagram"
Diagram redone.
The word “Core” was added to the regulator block
title.
Table 2.4, “System and
Power Signals,” on page 18
Changed VDD_CORE/VDD18CORE bulk
capacitor value from 10uF to 4.7uF.
Rev. 2.2
(06-10-08)
Auto-negotiation
Advertisement on page 120
Bits 9 and 15 relabeled as Reserved, Read-Only
(RO), with a default of 0.
Auto-negotiation
Advertisement on page 120
Fixed definition of bits 11:10 when equal to “11” by
adding “advertise support for..” to beginning of
definition. Also added note stating “When both
symmetric PAUSE and asymmetric PAUSE
support are advertised, the device will only be
configured to, at most, one of the two settings
upon auto-negotiation completion.”
Section 3.5, "Wake-up
Frame Detection," on
page 26 and Section 5.4.1,
"MAC_CR—MAC Control
Register," on page 106
Added note: “When wake-up frame detection is
enabled via the WUEN bit of the WUCSR—Wake-
up Control and Status Register, a broadcast wake-
up frame will wake-up the device despite the state
of the Disable Broadcast Frame (BCAST) bit in the
MAC_CR—MAC Control Register.”
Section 5.4.12,
"WUCSR—Wake-up Control
and Status Register," on
page 115
Fixed typo in bit 9: “... Mac Address [1:0] bit set to
0.” was changed to “...Mac Address [0] bit set to 0.”
Section 3.6.1.1, "RX
Checksum Calculation," on
page 32
“checksum = [B0, B1] + C0 + [B2, B3] + C1 + …
+ [0, BN] + CN-1” changed to “checksum = [B1,
B0] + C0 + [B3, B2] + C1 + … + [0, BN] + CN-1”
Section 2.2, “External Pull-
Up/Pull-Down Resistors
Added section. Added references to this section
throughout the pin description tables as applicable.
Rev. 2.1
(05-13-08)
Section 1.1, "Block
Diagram"
Removed the system memory block and arrow
above the microprocessor/ microcontroller
Rev. 1.92
(10-22-07)
Chapter 2 Pin Description
and Configurationon
page 15
Pin assignment information re-organized into
separate table.
EECLK pin description in
Chapter 2 Pin Description
and Configurationon
page 15
Note added to EECLK pin description to indicate
proper usage.
Table 9.1 Customer Revision History (continued)
REVISION LEVEL & DATE SECTION/FIGURE/ENTRY CORRECTION