Datasheet

16-bit Non-PCI Small Form Factor 10/100 Ethernet Controller with Variable Voltage I/O & HP Auto-MDIX Support
Datasheet
Revision 2.9 (03-01-12) 138 SMSC LAN9220
DATASHEET
6.11 EEPROM Timing
The following specifies the EEPROM timing requirements for the LAN9220:
Figure 6.10 EEPROM Timing
Table 6.11 EEPROM Timing Values
SYMBOL DESCRIPTION MIN TYP MAX UNITS
t
CKCYC
EECLK Cycle time 1110 1130 ns
t
CKH
EECLK High time 550 570 ns
t
CKL
EECLK Low time 550 570 ns
t
CSHCKH
EECS high before rising edge of EECLK 1070 ns
t
CKLCSL
EECLK falling edge to EECS low 30 ns
t
DVCKH
EEDIO valid before rising edge of EECLK
(OUTPUT)
550 ns
t
CKHDIS
EEDIO disable after rising edge EECLK
(OUTPUT)
550 ns
t
DSCKH
EEDIO setup to rising edge of EECLK (INPUT) 90 ns
t
DHCKH
EEDIO hold after rising edge of EECLK
(INPUT)
0ns
t
CKLDIS
EECLK low to data disable (OUTPUT) 580 ns
t
CSHDV
EEDIO valid after EECS high (VERIFY) 600 ns
t
DHCSL
EEDIO hold after EECS low (VERIFY) 0 ns
t
CSL
EECS low 1070 ns