Datasheet

16-bit Non-PCI Small Form Factor 10/100 Ethernet Controller with Variable Voltage I/O & HP Auto-MDIX Support
Datasheet
Revision 2.9 (03-01-12) 134 SMSC LAN9220
DATASHEET
6.7 PIO Writes
PIO writes are used for all LAN9220 write cycles. PIO writes can be performed using Chip Select (nCS)
or Write Enable (nWR). Either or both of these control signals must go high between cycles for the
period specified.
Note: The “Data Bus” width is 16 bits.
Note: A PIO Write cycle begins when both nCS and nWR are asserted. The cycle ends when either
or both nCS and nWR are deasserted. They may be asserted and deasserted in any order.
Parameters t
csh
and t
csl
must be extended using wait states to meet the t
cycle
minimum.
Figure 6.6 PIO Write Cycle Timing
Table 6.7 PIO Write Cycle Timing
SYMBOL DESCRIPTION MIN TYP MAX UNITS
t
cycle
Write Cycle Time 165 ns
t
csl
nCS, nWR Assertion Time 32 ns
t
csh
nCS, nWR Deassertion Time (see Note below) 13 133 ns
t
asu
Address Setup to nCS, nWR Assertion 0 ns
t
ah
Address Hold Time 0 ns
t
dsu
Data Setup to nCS, nWR Deassertion 7 ns
t
dh
Data Hold Time 0 ns
Data Bus
nCS, nWR
A
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7:1
]