Datasheet

16-bit Non-PCI Small Form Factor 10/100 Ethernet Controller with Variable Voltage I/O & HP Auto-MDIX Support
Datasheet
SMSC LAN9220 123 Revision 2.9 (03-01-12)
DATASHEET
5.5.9 Special Modes
Note 5.4 When MODE=111, the register 0 bits 13 and 8 are variable dependant on the auto-
negotiated speed and duplex.
Index (In Decimal): 18 Size: 16-bits
ADDRESS DESCRIPTION TYPE DEFAULT
15-8 Reserved RW,
NASR
7:5 MODE: PHY Mode of operation. Refer to Table 5.9 for more details. RW,
NASR
111
4:0 PHYAD: PHY Address:
The PHY Address is used for the SMI address.
RW,
NASR
00001b
Table 5.9 MODE Control
MODE MODE DEFINITIONS
DEFAULT REGISTER BIT VALUES
REGISTER 0 REGISTER 4
[13,12,10,8] [8,7,6,5]
000 10Base-T Half Duplex. Auto-negotiation disabled. 0000 N/A
001 10Base-T Full Duplex. Auto-negotiation disabled. 0001 N/A
010 100Base-TX Half Duplex. Auto-negotiation disabled.
CRS is active during Transmit & Receive.
1000 N/A
011 100Base-TX Full Duplex. Auto-negotiation disabled.
CRS is active during Receive.
1001 N/A
100 100ase-TX Half Duplex is advertised. Auto-
negotiation enabled.
CRS is active during Transmit & Receive.
1100 0100
101 Repeater mode. Auto-negotiation enabled.
100Base-TX Half Duplex is advertised.
CRS is active during Receive.
1100 0100
110 Reserved - Do not set the LAN9220 in this mode. N/A N/A
111 All capable. Auto-negotiation enabled. X10X
Note 5.4
1111