Datasheet

Non-PCI Single-Chip Full Duplex Ethernet Controller with Magic Packet
Datasheet
SMSC LAN91C96 5v&3v Page 99 Revision 1.0 (10-24-08)
DATASHEET
Chapter 12 Timing Diagrams
Figure 12.1 – Card Configuration Registers – Read/Write PCMCIA Mode (A15=1)
ns
ns
ns
ns
ns
ns
ns
ns
ns
40
50
30
9
25
15
25
15
60
0
t57
t58
t59
t60
t61
t62
t63
t64
t65
Write Data Setup to nWE Rising
Write Data Hold after nWE Rising
nOE Low to Valid Data
Address, nREG Setup to nWE Active
Address, nREG Hold after nOE Inactive
Address, nREG Setup to nOE Active
Address, nREG Hold after Control Inactive
nCE1 Setup to nWE Rising
nCE1 Low to Valid Data
Parameter min typ max units
t60
t63
t62 t61
t60
t64
t57
t58
t59
t65
valid valid
valid valid
A0-9,A15
nREG
nCE1
nWE
nOE
D0-7
t63