Datasheet

Non-PCI Single-Chip Full Duplex Ethernet Controller with Magic Packet
Datasheet
SMSC LAN91C96 5v&3v Page 91 Revision 1.0 (10-24-08)
DATASHEET
 nAS to nAEN/nAS
 68000 Address<23:1> to 91C96 Address Bus
 DATA to DATA (Upper and lower bytes swapped)
 Interrupt (if used) to INT0
The following signals MUST be pulled as stated:
 LAN91C96 Address bit 0 tied low
 LAN91C96 nSBHE input tied low
 All INTx must have a 1KΩ to 10KΩ pull-up to keep the line high while the drivers are tri-stated.
CONFIGURATION REG.
BASE REG.
CONFIGURATION REG.
BASE REG.
CONFIGURATION REG.
BASE REG.
CONFIGURATION REG.
BASE REG.
CONFIGURATION REG.
BASE REG.
CONFIGURATION REG.
BASE REG.
CONFIGURATION REG.
BASE REG.
IA0-1
IA2-3
IA4-5
IOS2-0 WORD ADDRESS
000 0h
1h
4h
5h
8h
9h
Ch
Dh
10h
11h
14h
15h
18h
19h
20h
21h
22h
001
010
011
100
101
110
XXX
16 BITS
FIGURE 10.1 - 64 X 16 SERIAL EEPROM MAP