Datasheet

Non-PCI Single-Chip Full Duplex Ethernet Controller with Magic Packet

Datasheet

SMSC LAN91C96 5v&3v Page 63 Revision 1.0 (10-24-08)

DATASHEET

nXNDEC - Read only bit reflecting the status of the nXENDEC pin.

IOS0-2 - Read only bits reflecting the status of the IOS0-2 pins.

MDO - The value of this bit drives the EEDO pin when MDOE=1.

MDCLK - The value of this bit drives the EESK pin when MDOE=1.

MDOE - When this bit is high pins EEDO EECS and EESK will be used for transceiver management

functions, otherwise the pins assume the EEPROM values.

MODE=0 MODE=1

EEDO Serial EEPROM Data Out Bit MDO

EESK Serial EEPROM Clock Bit MCLK

EECS Serial EEPROM Chip Select 0

I/O SPACE - BANK3

OFFSET NAME TYPE SYMBOL

A REVISION REGISTER READ ONLY REV

0 0 1 1 0 0 1 1

CHIP

REV

0 1 0 0 1 0 0 1

CHIP ID VALUE DEVICE

3 LAN91C90/LAN91C92

4 LAN91C94

5 LAN91C95

(Note 7.2)

LAN91C96

7 LAN91C100

8 LAN91C100FD

9 LAN91C110

CHIP - Chip ID. Can be used by software drivers to identify the device used.

REV - Revision ID. Incremented for each revision of a given device.

Note 7.2 The LAN91C96 shares the same chip ID (#4) as the LAN91C94. The Rev. ID for the LAN91C96 will begin

from six (#6).