Datasheet

Non-PCI Single-Chip Full Duplex Ethernet Controller with Magic Packet

Datasheet

SMSC LAN91C96 5v&3v Page 57 Revision 1.0 (10-24-08)

DATASHEET

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OFFSET NAME TYPE SYMBOL

6 POINTER REGISTER READ/WRITE PTR

RCV

AUTO

INCR.

READ Reserved Reserved

POINTER HIGH

0 0 0 0 0 0 0 0

POINTER LOW

0 0 0 0 0 0 0 0

POINTER REGISTER - The value of this register determines the address to be accessed within the

transmit or receive areas. It will auto-increment on accesses to the data register when AUTO INCR. is set.

The increment is by one for every byte access, and by two for every word access. When RCV is set the

address refers to the receive area and uses the output of RX FIFO as the packet number, when RCV is

clear the address refers to the transmit area and uses the packet number at the Packet Number Register.

READ bit - Determines the type of access to follow. If the READ bit is high the operation intended is a

read. If the READ bit is low the operation is a write. Loading a new pointer value, with the READ bit high,

generates a pre-fetch into the Data Register for read purposes.

Read-back of the pointer will indicate the value of the address last accessed by the CPU (rather than the

last pre-fetched). This allows any interrupt routine that uses the pointer, to save it and restore it without

affecting the process being interrupted.

The Pointer Register should not be loaded until 400ns after the last write operation to the Data Register to

ensure that the Data Register FIFO is empty. On reads, if IOCHRDY is not connected to the host, the Data

fill.

If the pointer is loaded using 8 bit writes, the low byte should be loaded first and the high byte last.

Reserved – Must be 0.

If AUTO INCR. is not set, the pointer must be loaded with an even value.

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OFFSET NAME TYPE SYMBOL

8 & A DATA REGISTER READ/WRITE DATA

DATA HIGH

DATA LOW

DATA REGISTER - Used to read or write the data buffer byte/word presently addressed by the pointer