Datasheet

Non-PCI Single-Chip Full Duplex Ethernet Controller with Magic Packet
Datasheet
Revision 1.0 (10-24-08) Page 34 SMSC LAN91C96 5v&3v
DATASHEET
ECSR Power Down bit must not be set to one (1) in LOCAL BUS mode.
Table 5.8 - PCMCIA Mode (Refer To Table 5.7 For Next States To Wake-Up Events)
CURRENT STATE
NO.
PWRDWN
PIN
(A=ASSRTD)
ECOR
FUNC
ENABLE
ECSR
PWR
DOWN
CTR
PWR
DWN
BIT
CTR
WAKEUP_E
N BIT
POWERS
DOWN
DOES NOT POWER
DOWN
1 A X X X X
Everything.
Asserts the
modem power
down pin
(nPWDN)
also
2 nA 1 0 0 0
Ethernet Tx, Rx,
Link; PCMCIA
Att/Config Mem
3 nA 1 0 0 1 Ethernet Tx
Ethernet Rx, Link;
PCMCIA Att/Config
Mem
4 nA 1 0 1 1
Ethernet Tx,
Rx
1
, Link
1
PCMCIA Att/Conf
Memory
5 nA 0 X X 0
Ethernet Tx,
Rx, Link
PCMCIA Att/Conf
Memory
6 nA 0 X
X 1
Ethernet Tx,
Rx
1
, Link
1
PCMCIA Att/Conf
Memory
7 nA 1 1 0 0
Ethernet Tx,
Rx, Link
PCMCIA Att/Config
Mem
7S nA 1 1 1 0
Ethernet Tx,
Rx, Link
PCMCIA Att/Config
Mem
8 nA 1 1 0 1
Ethernet Tx,
Rx
1
, Link
1
PCMCIA Att/Config
Mem
8S nA 1 1 1 1
Ethernet Tx,
Rx
1
, Link
1
PCMCIA Att/Config
Mem
Note
1
: The LAN91C96 implementation is different from the LAN91C95; the LAN91C96 powers down the Ethernet
Rx and Link logic also, whereas, the LAN91C95 does not.
Table 5.9 - PCMCIA Mode
NEXT STATE
NO. WAKES UP BY
PWR DWN PIN
(A= ASSRTD)
ECOR
FUNC
ENABLE
ECSR
PWR
DOWN
CTR
PWRDWN
BIT
CTR
WAKEUP_EN
BIT
COMMENTS
1
PWRDWN Pin
deassertion
nA
No
change
No
change
No change No change
Pin deassertion
will make the
Att/Conf Mem
accessible
entirely
2 nA 1 0 0 0 Fully Awake
3
By writing a 0 to
CTR WAKEUP_EN
bit
nA 1 0 0 0