Datasheet

Non-PCI Single-Chip Full Duplex Ethernet Controller with Magic Packet
Datasheet
Revision 1.0 (10-24-08) Page 28 SMSC LAN91C96 5v&3v
DATASHEET
Figure 5.4 - LAN91C96 Internal Block Diagram with Data Path
8-16 bit
Bus
Interface
Unit
Arbiter
DMA
MMU
Ethernet
Protocol
Handler
(EPH)
Twisted Pair
Transceiver
6K Byte
SRAM
WR
FIFO
RD
FIFO
Control
RX Data
TX Data
Control
Control
Address
Data
Control
Control
TX/RX
FIFO
Pointer
TPI
TPO
Control
EEPROM
INTERFACE
TX Data
RX Data
ENDEC
AUI