Datasheet

Non-PCI Single-Chip Full Duplex Ethernet Controller with Magic Packet
Datasheet
Revision 1.0 (10-24-08) Page 26 SMSC LAN91C96 5v&3v
DATASHEET
B A B C
STATUS
COUNT
DATA
STATUS
COUNT
DATA
PACKET #A PACKET #B
PACKET NUMBER
REGISTER
TX FIFO
TO
CSMA
LINEAR ADDRESS MMU MAPPING
MEMORY
CPU
SIDE
STATUS
COUNT
DATA
PACKET #C
TX COMPLETION
FIFO
FIFO PORTS
REGISTER
C
Figure 5.2 – Transmit Queues and Mapping