Datasheet

Non-PCI Single-Chip Full Duplex Ethernet Controller with Magic Packet
Datasheet
Revision 1.0 (10-24-08) Page 102 SMSC LAN91C96 5v&3v
DATASHEET
Figure 12.4 – Local Bus Consecutive Write Cycles
VALID ADDRESS
VALID ADDRESS
t15
t4
t3
t20
A0-15
AEN, nSBHE
nIOCS16
nIOWR
D0-15
VALID DATA IN
VALID DATA
t7
t8
BALE Tied High
t3
t4
t7
t8
t15
t20
12
ns
ns
ns
ns
ns
ns
Address, nSBHE, AEN Setup to Control Active
Address, nSBHE, AEN Hold after Control
Inactive
Data Setup to nIOWR Rising
Data Hold after nIOWR Rising
A4-A15, AEN Low, BALE High to nIOCS16
Low
Cycle time*
Parameter min typ max units
10
5
5
5
185
IOCHRDY not used - t20 has to be met
*Note: The cycle time is defined only for consecutive accesses to the Data Register. These values assume
that IOCHRDY is not used.