Datasheet

10/100 Non-PCI Ethernet Single Chip MAC + PHY
Datasheet
Revision 1.92 (06-27-11) 82 SMSC LAN91C111 REV C
DATASHEET
The bit definitions are analogous to the Auto Negotiation Advertisement Register.
9.6 Register 16. Configuration 1- Structure and Bit Definition
TX_HDX 10_FDX 10_HDX Reserved Reserved Reserved Reserved CSMA
RR R RRRRR
00 0 00000
LNKDIS XMTDIS XMTPDN Reserved Reserved BYPSCR UNSCDS EQLZR
RW RW RW RW RW RW RW RW
00 0 00000
CABLE RLVL0 TLVL3 TLVL2 TLVL1 TLVL0 TRF1 TRF0
RW RW RW RW RW RW RW RW
00 1 00010
LNKDIS: Link Disable 1 = Receive Link
Detect Function
Disabled (Force Link
Pass)
0 = Normal
XMTDIS: TP Transmit 1 = TP Transmitter
Disabled
0 = Normal
XMTPDN: TP Transmit 1 = TP Transmitter
Powered Down
Powerdown 0 = Normal
RESERVED: RESERVED Reserved, Must be 0
for Proper Operation
BYPSCR: Bypass 1 = Bypass
Scrambler/Descram
bler
Scrambler/Descr- 0 = No Bypass
ambler Select
UNSCDS: Unscrambled Idle 1 = Disable
AutoNegotiation with
devices that transmit
unscrambled