Datasheet

10/100 Non-PCI Ethernet Single Chip MAC + PHY
Datasheet
Revision 1.92 (06-27-11) 62 SMSC LAN91C111 REV C
DATASHEET
8.17 Bank 2 - Packet Number Register
PACKET NUMBER AT TX AREA - The value written into this register determines which packet number
is accessible through the TX area. Some MMU commands use the number stored in this register as
the packet number parameter. This register is cleared by a RESET or a RESET MMU Command.
This register is updated upon an ALLOCATE MEMORY MMU command.
FAILED - A zero indicates a successful allocation completion. If the allocation fails the bit is set and
only cleared when the pending allocation is satisfied. Defaults high upon reset and reset MMU
command. For polling purposes, the ALLOC_INT in the Interrupt Status Register should be used
because it is synchronized to the read operation. Sequence:
1. Allocate Command
2. Poll ALLOC_INT bit until set
3. Read Allocation Result Register
ALLOCATED PACKET NUMBER - Packet number associated with the last memory allocation request.
The value is only valid if the FAILED bit is clear.
Note: For software compatibility with future versions, the value read from the ARR after an allocation
request is intended to be written into the PNR as is, without masking higher bits (provided
FAILED = 0).
OFFSET NAME TYPE SYMBOL
2
PACKET NUMBER
REGISTER READ/WRITE PNR
Reserved Reserved PACKET NUMBER AT TX AREA
00000000
OFFSET NAME TYPE SYMBOL
3
ALLOCATION RESULT
REGISTER READ ONLY ARR
FAILED Reserved ALLOCATED PACKET NUMBER
10000000