Datasheet

High Performance Single-Chip 10/100 Non-PCI Ethernet Controller
Datasheet
Revision 1.5 (07-11-08) 66 SMSC LAN9118
DATASHEET
Chapter 5 Register Description
The following section describes all LAN9118 registers and data ports.
Figure 5.1 LAN9118 Memory Map
MAC CS R Port
A4h
B0h
Base + 00h
RESERVED
B4h
A0h
RX Data FIFO Port
TX Data FIFO Port
RX Status FIFO Port40h
20h
50h
FCh
EEPROM Port
04h
1Ch
RX Data FIFO Alias Ports
24h
3Ch
TX Data FIFO Alias Ports
RX Status FIFO PEEK44h
TX Status FIFO Port48h
TX Status FIFO PEEK4Ch
A8h
ACh