Datasheet

High Performance Single-Chip 10/100 Non-PCI Ethernet Controller
Datasheet
Revision 1.5 (07-11-08) 34 SMSC LAN9118
DATASHEET
Figure 3.4 EEPROM ERASE Cycle
ERAL (Erase All): If erase/write operations are enabled in the EEPROM, this command will initiate a
bulk erase of the entire EEPROM.The EPC_TO bit is set if the EEPROM does not respond within
30ms.
Figure 3.5 EEPROM ERAL Cycle
1
EECLK
EEDIO (INPUT)
EEDIO (OUTPUT)
EECS
11A6 A0
t
CSL
0
EECLK
EEDIO (INPUT)
EEDIO (OUTPUT)
EECS
1010
t
CSL