Datasheet
High Performance Single-Chip 10/100 Non-PCI Ethernet Controller
Datasheet
Revision 1.5 (07-11-08) 14 SMSC LAN9118
DATASHEET
Chapter 2 Pin Description and Configuration
Figure 2.1 Pin Configuration
**Denotes a multifunction pin
*1 This NC pin can also be tied to VDD_A for backward compatibility
*2 This NC pin can also be tied to VSS_A for backward compatibility
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
75
74
73
72
71
70
69
68
67
66
65
64
63
62
61
60
59
58
57
56
55
54
53
52
51
100
99
98
97
96
95
94
93
92
91
90
89
88
87
86
85
84
83
82
81
80
79
78
77
76
GND_CORE
VREG
VDD_CORE
VSS_PLL
XTAL2
XTAL1
VDD_PLL
VDD_REF
ATEST
RBIAS
VSS_REF
A7
A6
A5
A4
A3
A2
A1
GND_IO
VDD_IO
D31
D30
D29
D28
D27
NC
SPEED_SEL
NC
IRQ
NC
PME
EECLK**
EECS
EEDIO**
GND_CORE
VDD_CORE
D0
D1
D2
VDD_IO
GND_IO
D3
D4
D5
D6
VDD_IO
GND_IO
D7
D8
D9
D26
GND_IO
VDD_IO
D25
D24
D23
D22
D21
GND_IO
VDD_IO
D20
D19
D18
D17
D16
GND_IO
VDD_IO
D15
D14
D13
D12
GND_IO
VDD_IO
D11
D10
GPIO2/nLED3**
GPIO1/nLED2**
GPIO0/nLED1**
VDD_IO
GND_IO
nRESET
nCS
nWR
nRD
NC*1
NC*2
VDD_A
VSS_A
EXRES1
VSS_A
VDD_A
NC
TPI+
TPI-
VDD_A
VSS_A
TPO+
TPO-
VSS_A
FIFO_SEL
SMSC
LAN9118
100 PIN TQFP