Datasheet
Table Of Contents
- Small Footprint RMII 10/100 Ethernet Transceiver with HP Auto-MDIX Support
- 1.0 Introduction
- 2.0 Pin Description and Configuration
- 3.0 Functional Description
- 3.1 Transceiver
- 3.2 Auto-negotiation
- 3.3 HP Auto-MDIX Support
- 3.4 MAC Interface
- 3.5 Serial Management Interface (SMI)
- 3.6 Interrupt Management
- 3.7 Configuration Straps
- 3.8 Miscellaneous Functions
- 3.9 Application Diagrams
- 4.0 Register Descriptions
- 4.1 Register Nomenclature
- 4.2 Control and Status Registers
- TABLE 4-2: SMI Register Map
- 4.2.1 Basic Control Register
- 4.2.2 Basic Status Register
- 4.2.3 PHY Identifier 1 Register
- 4.2.4 PHY Identifier 2 Register
- 4.2.5 Auto Negotiation Advertisement Register
- 4.2.6 Auto Negotiation Link Partner Ability Register
- 4.2.7 Auto Negotiation Expansion Register
- 4.2.8 Mode Control/Status Register
- 4.2.9 Special Modes Register
- 4.2.10 Symbol Error Counter Register
- 4.2.11 Special Control/Status Indications Register
- 4.2.12 Interrupt Source Flag Register
- 4.2.13 Interrupt Mask Register
- 4.2.14 PHY Special Control/Status Register
- 5.0 Operational Characteristics
- 6.0 Package Information
- 7.0 Application Notes
- Appendix A: Data Sheet Revision History
- The Microchip Web Site
- Customer Change Notification Service
- Customer Support
- Product Identification System
- Worldwide Sales and Service

LAN8720A/LAN8720AI
DS00002165B-page 8 2016 Microchip Technology Inc.
Note 2-3 Configuration strap values are latched on power-on reset and system reset. Configuration straps are
identified by an underlined symbol name. Signals that function as configuration straps must be
augmented with an external resistor when connected to a load. Refer to
Section 3.7, "Configuration
Straps," on page 29 for additional information.
1 Carrier Sense
/ Receive
Data Valid
CRS_DV VO8 This signal is asserted to indicate the receive
medium is non-idle. When a 10BASE-T packet is
received, CRS_DV is asserted, but RXD[1:0] is
held low until the SFD byte (10101011) is
received.
Note: Per the RMII standard, transmitted data is
not looped back onto the receive data
pins in 10BASE-T half-duplex mode.
PHY Operat-
ing Mode 2
Configuration
Strap
MODE2 VIS
(PU)
Combined with MODE0 and MODE1, this config-
uration strap sets the default PHY mode.
See Note 2-3 for more information on configura-
tion straps.
Note: Refer to Section 3.7.2, "MODE[2:0]:
Mode Configuration," on page 27 for
additional details.
TABLE 2-2: LED PINS
NUM PINS NAME SYMBOL
BUFFER
TYPE
DESCRIPTION
1
LED 1 LED1 O12 Link activity LED Indication. This pin is driven
active when a valid link is detected and blinks
when activity is detected.
Note: Refer to Section 3.8.1, "LEDs," on
page 32 for additional LED information.
Regulator Off
Configuration
Strap
REGOFF IS
(PD)
This configuration strap is used to disable the
internal 1.2V regulator. When the regulator is dis
-
abled, external 1.2V must be supplied to VDDCR.
• When REGOFF is pulled high to VDD2A with
an external resistor, the internal regulator is
disabled.
• When REGOFF is floating or pulled low, the
internal regulator is enabled (default).
See Note 2-4 for more information on configura-
tion straps.
Note: Refer to Section 3.7.4, "REGOFF:
Internal +1.2V Regulator Configuration,"
on page 32 for additional details.
TABLE 2-1: RMII SIGNALS (CONTINUED)
Num Pins Name Symbol
Buffer
Type
Description