Datasheet

LAN8720A/LAN8720AI
DS00002165B-page 64  2016 Microchip Technology Inc.
Note 5-26 The maximum allowable values for Frequency Tolerance and Frequency Stability are application
dependent. Since any particular application must meet the IEEE ±50 PPM Total PPM Budget, the
combination of these two values must be approximately ±45 PPM (allowing for aging).
Note 5-27 Freque
ncy Deviation Over Time is also referred to as Aging.
Note 5-28 The t
otal deviation for the Transmitter Clock Frequency is specified by IEEE 802.3u as 
±100 PPM.
Note 5-29 0
o
C for extended commercial version, -40
o
C for industrial version.
Note 5-30 This n
umber includes the pad, the bond wire and the lead frame. PCB capacitance is not included
in this value. The XTAL1/CLKIN pin, XTAL2 pin and PCB capacitance values are required to
accurately calculate the value of the two external load capacitors. The total load capacitance must
be equivalent to what the crystal expects to see in the circuit so that the crystal oscillator will operate
at 25.000 MHz.
5.6.2 100UW 25MHZ CRYSTAL SPECIFICATION
When utilizing a 100uW 25MHz crystal, the following circuit design (Figure 5-9) and specifications (Table 5-13) are
required to ensure proper operation.
FIGURE 5-8: 100UW 25MHZ CRYSTAL CIRCUIT
LAN8720
XTAL2
XTAL1
R
S
Y1
C
1
C
2
TABLE 5-14: 100UW 25MHZ CRYSTAL SPECIFICATIONS
Parameter Symbol Min Nom Max Units Notes
Crystal Cut AT, typ —
Crystal Oscillation Mode Fundamental Mode —
Crystal Calibration Mode Parallel Resonant Mode —
Frequency F
fund
— 25.000 — MHz —
Frequency Tolerance @ 25
o
C F
tol
— — ±50 PPM Note 5-31
Frequency Stability Over Temp F
temp
— — ±50 PPM Note 5-31
Frequency Deviation Over Time F
age
— ±3 to 5 — PPM Note 5-32
Total Allowable PPM Budget — — — ±50 PPM Note 5-33
Shunt Capacitance C
O
— — 5 pF —
Load Capacitance C
L
8 — 12 pF —
Drive Level P
W
— 100 — uW Note 5-34